US Patent 7453160 Simplified wafer alignment

The present invention is directed to aligning wafers within semiconductor fabrication tools. More particularly, one or more aspects of the present invention pertain to quickly and efficiently finding an alignment marking, such as an alignment notch, on a wafer to allow the wafer to be appropriately oriented within an alignment tool. Unlike conventional systems, the notch is located without firmly holding and spinning or rotating the wafer. Exposure to considerable backside contaminants is thereby mitigated and the complexity and/or cost associated with aligning the wafer is thereby reduced.