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US Patent 7581089 Method of protecting a computer stack
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Patent
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Date Filed
April 18, 2007
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Date of Patent
August 25, 2009
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Patent Application Number
11787832
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Patent Citations Received
US Patent 12135780 Processor extensions to protect stacks during ring transitions
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US Patent 11914726 Access control for processor registers based on execution domains
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US Patent 12001842 Hardware apparatuses and methods to switch shadow stack pointers
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US Patent 11656805 Processors, methods, systems, and instructions to protect shadow stacks
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US Patent 11663006 Hardware apparatuses and methods to switch shadow stack pointers
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US Patent 11762566 Programmable mapping of guard tag storage locations
US Patent 11762982 Processor extensions to protect stacks during ring transitions
US Patent 11789735 Control transfer termination instructions of an instruction set architecture (ISA)
US Patent 11868774 Processor with hardware supported memory buffer overflow detection
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
7581089
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Patent Primary Examiner
Eric Coleman
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