Is a
Patent attributes
Current Assignee
Patent Jurisdiction
Patent Number
Patent Inventor Names
Srinath Krishnan0
Date of Patent
December 1, 2009
0Patent Application Number
120476360
Date Filed
March 13, 2008
0Patent Primary Examiner
Patent abstract
A method of manufacturing an integrated circuit (IC) can utilize a shallow trench isolation (STI) technique. The shallow trench isolation technique can be used in an IC process. Separate liners for the trench are used for NMOS and PMOS regions. The liners can induce strain in the substrate.
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