US Patent 7642603 Semiconductor device with reduced fringe capacitance
Patent 7642603 was granted and assigned to Intel on January, 2010 by the United States Patent and Trademark Office.
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Patent abstract
In one embodiment of the invention, a non-planar transistor includes a gate electrode and multiple fins. A trench contact is coupled to the fins. The contact bottom is formed above the substrate and does not directly contact the substrate. The contact bottom is higher than the gate top.
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US Patent 07642603 Semiconductor device with reduced fringe capacitance US Patent 7642603 Semiconductor device with reduced fringe capacitance
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Patent Number
0764260300
Patent Number
764260300
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
076426030
Date of Patent
January 5, 2010
0Patent Application Number
118238920
Date Filed
June 29, 2007
0Official Website
Patent Primary Examiner
Edits on 27 Sep, 2022
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Infobox
Is a
Current Assignee
Patent Jurisdiction
Patent Number
076426030
Date of Patent
January 5, 2010
0Patent Application Number
118238920
Date Filed
June 29, 2007
0Official Website
Patent Primary Examiner
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US Patent 07642603 Semiconductor device with reduced fringe capacitance
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07642603
Date of patent
January 5, 2010
Patent application number
11823892
Date Filed
June 29, 2007
Patent primary examiner
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