Patent 7661078 was granted and assigned to Cadence Design Systems on February, 2010 by the United States Patent and Trademark Office.
Disclosed is an improved method and system for implementing metal fill for an integrated circuit design. When an engineering change order is implemented, the existing dummy metal fill geometries are initially ignored when modifying the layout, even if this results in shorts and/or other DRC violations. Once the ECO changes have been implemented, those violations caused by interaction between the changes and the metal fill are repaired afterwards.