US Patent 7685483 Design features for testing integrated circuits

Systems and methods are disclosed herein to provide test features for integrated circuits. For example, in accordance with an embodiment of the present invention, an integrated circuit includes an input signal path adapted to route an address signal for a configurable memory. An input multiplexer, coupled to the input signal path, is controllable to route a first test signal provided via the input signal path for at least one memory configuration that does not use the input signal path for the address signal.