US Patent 7692103 Wiring substrate and manufacturing process of the same

A wiring substrate includes a lower insulating resin layer; wiring pattern layers provided on surfaces of the lower insulating resin layer; upper insulating resin layers; and via holes and via conductors connected electrically with at least one of the wiring pattern layers. An upper insulating resin layer includes an epoxy resin containing 30 to 50% by weight of an inorganic filler of SiO2 having an average grain diameter of 1.0 to 10.0 μm, and a via having a lower end opening diameter of between 40 μm and 60 μm.