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US Patent 7724815 Method and apparatus for a programmably terminated receiver

Patent 7724815 was granted and assigned to Xilinx on May, 2010 by the United States Patent and Trademark Office.

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Patent
Patent

Patent attributes

Current Assignee
Xilinx
Xilinx
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7724815
Date of Patent
May 25, 2010
Patent Application Number
11711520
Date Filed
February 27, 2007
Patent Citations Received
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US Patent 12105667 Device with data processing engine array that enables partial reconfiguration
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US Patent 12026444 Dynamic port handling for isolated modules and dynamic function exchange
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US Patent 12067406 Multiple overlays for use with a data processing array
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US Patent 12079158 Reconfigurable neural engine with extensible instruction set architecture
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US Patent 11853235 Communicating between data processing engines using shared memory
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US Patent 11922223 Flexible data-driven software control of reconfigurable platforms
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US Patent 11972132 Data processing engine arrangement in a device
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US Patent 12001367 Multi-die integrated circuit with data processing engine array
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Patent Primary Examiner
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Phuong Phu
Patent abstract

A method and apparatus for a receive equalizer of a gigabit transceiver that is reconfigurable to support multiple communication standards. Communication standards having variable common mode and coupling requirements are accommodated through the use of reconfigurable integrated circuits (ICs), such as field programmable gate arrays (FPGAs), that provide a plurality of reconfigurable transceivers that are programmable through configuration, or partial reconfiguration, events. The reconfigurable transceivers apply internally generated common mode voltage signals to the differential input in support of the various communication standards.

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