US Patent 7759992 CML circuit and clock distribution circuit
Patent 7759992 was granted and assigned to NEC Corporation on July, 2010 by the United States Patent and Trademark Office.
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Patent abstract
A clock distribution circuit according to an exemplary aspect of the present invention comprises a drive power boost signal generator which generates and outputs a drive power boost signal, and a CML circuit which outputs a first signal combined by a second signal when the drive power boost signal indicates active state and outputs the first signal when the drive power boost signal indicates an inactive state.
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US Patent 07759992 CML circuit and clock distribution circuit US Patent 7759992 CML circuit and clock distribution circuit
Infobox
Patent Number
0775999200
Patent Number
775999200
Edits on 23 Apr, 2023
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Infobox
Is a
Current Assignee
0
Patent Jurisdiction
Patent Number
077599920
Date of Patent
July 20, 2010
0Patent Application Number
117278490
Date Filed
March 28, 2007
0Official Website
Patent Primary Examiner
Edits on 24 Sep, 2022
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Infobox
Is a
Current Assignee
0
Patent Jurisdiction
Patent Number
077599920
Date of Patent
July 20, 2010
0Patent Application Number
117278490
Date Filed
March 28, 2007
0Official Website
Patent Primary Examiner
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US Patent 07759992 CML circuit and clock distribution circuit
Infobox
Is a
Current assignee
Patent jurisdiction
Patent number
07759992
Date of patent
July 20, 2010
Patent application number
11727849
Date Filed
March 28, 2007
Patent primary examiner
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