Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Toshirou Kitaoka0
Taro Fujii0
Date of Patent
July 26, 2011
Patent Application Number
12213959
Date Filed
June 26, 2008
Patent Primary Examiner
Patent abstract
Disclosed is a reconfigurable device including at least a bus that mutually connects functional blocks, a configuration information memory disposed corresponding to each of the functional blocks, an error detection circuit that detects an error in the configuration information memory, and a buffer which is on-off controlled based on information stored in the configuration information memory and each of which controls connection between each of the functional blocks and each bus. When an error in the configuration information memory is detected by the error detection circuit, the buffer with an output thereof connected to the bus is set to an off-state, based on a result of error detection.
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