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US Patent 8001512 Method and system for implementing context simulation

Patent 8001512 was granted and assigned to Cadence Design Systems on August, 2011 by the United States Patent and Trademark Office.

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Patent

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Current Assignee
Cadence Design Systems
Cadence Design Systems
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8001512
Date of Patent
August 16, 2011
Patent Application Number
11768851
Date Filed
June 26, 2007
Patent Citations Received
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US Patent 12123908 Loopback testing of integrated circuits
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US Patent 12013800 Die-to-die and chip-to-chip connectivity monitoring
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US Patent 12072376 Die-to-die connectivity monitoring
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US Patent 12092684 Integrated circuit workload, temperature, and/or sub-threshold leakage sensor
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US Patent 11704463 Method of etch model calibration using optical scatterometry
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US Patent 11762789 Integrated circuit I/O integrity and degradation monitoring
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US Patent 11841395 Integrated circuit margin measurement and failure prediction device
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US Patent 11921433 Optical metrology in machine learning to characterize features
0
...
Patent Primary Examiner
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Thuan Do
Patent abstract

A method, system, and computer program product are disclosed for using pattern-dependent models at early stages of the design process. This addresses the key disadvantage of prior approaches which are restricted to using such models later in the design process for IC designs that are nearly complete. Pattern-dependent manufacturing effects are extracted from early stage designs and using the extracted pattern-dependent effects to efficiently and effectively design the integrated circuit. One or more contexts are built around one or more units of the design, with examples of units being a block or cell. The units are then used in the context to generate pattern-dependent data as a basis for one or more pattern-dependent models.

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