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US Patent 8042087 Method to design network-on-chip (NOC)-based communication systems

Patent 8042087 was granted and assigned to École Polytechnique Fédérale de Lausanne on October, 2011 by the United States Patent and Trademark Office.

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Patent
Patent

Patent attributes

Current Assignee
École Polytechnique Fédérale de Lausanne
École Polytechnique Fédérale de Lausanne
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8042087
Date of Patent
October 18, 2011
Patent Application Number
12375525
Date Filed
October 10, 2007
Patent Citations Received
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US Patent 12135928 Constraints and objectives used in synthesis of a network-on-chip (NoC)
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US Patent 11836427 Constraints and objectives used in synthesis of a network-on-chip (NoC)
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US Patent 11956127 Incremental topology modification of a network-on-chip
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US Patent 12067335 Automatic configuration of pipeline modules in an electronics system
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US Patent 11657203 Multi-phase topology synthesis of a network-on-chip (NoC)
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US Patent 11675942 Optimization of parameters for synthesis of a topology using a discriminant function module
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US Patent 11748535 System and method to generate a network-on-chip (NoC) description using incremental topology synthesis
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US Patent 11784909 Quality metrics for optimization tasks in generation of a network
...
Patent Primary Examiner
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Helen Rossoshek
Patent abstract

A method to design a Networks on Chips (NoCs)-based communication system for connecting on-chip components in a multicore system, said system comprising several elements communicating through the communication system, said communication system comprising at least switches, said method comprising the steps of modelling the applications running on the multicore system, establishing the number and configuration of switches to connect the elements, establishing physical connectivity between the elements and the switches, for each two pairs of communicating elements: (a) a defining a communication path, (b) calculating metrics as affected by the need to render said path into physical connectivity, taking into account any previously defined physical connectivity, (c) iterating the steps a and b for a plurality of possible paths, (d) choosing the path having the optimal metrics, and (e) establishing any missing physical connectivity between the switches so that the selected optimal path occurs across physically connected switches.

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