US Patent 8049303 Semiconductor device with power noise suppression
Patent 8049303 was granted and assigned to Hitachi on November, 2011 by the United States Patent and Trademark Office.
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A semiconductor chip and a semiconductor device mounting the semiconductor chip capable of increasing a capacitance of a capacitor without reducing the number of signal bumps or power bumps of a package and the number of C4 solder balls of the semiconductor chip, and achieving a stable power supply with suppressing fluctuations of power at a resonance frequency without a limitation in a position to mount a capacitor for lowering noise of a signal transceiving interface block. In the semiconductor device, a via hole is provided to the semiconductor chip, a power-supply electrode connected to the via hole is provided to a back surface of the semiconductor chip, and a capacitor is mounted to the electrode on the back surface. And, a high-resistance material is used for a material of a power-supply via hole inside the semiconductor chip, thereby increasing the resistance and lowering the Q factor.
US Patent 08049303 Semiconductor device with power noise suppression US Patent 8049303 Semiconductor device with power noise suppression
US Patent 08049303 Semiconductor device with power noise suppression
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