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US Patent 8482111 Stackable molded microelectronic packages

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Date Filed
July 19, 2010
Date of Patent
July 9, 2013
Patent Application Number
12838974
Patent Citations Received
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US Patent 12107042 Localized high density substrate routing
0
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US Patent 11984396 Localized high density substrate routing
0
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US Patent 11990382 Fine pitch BVA using reconstituted wafer with area array accessible for testing
0
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US Patent RE49987 Multiple plated via arrays of different wire heights on a same substrate
0
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US Patent 11929337 3D-interconnect
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
8482111
Patent Primary Examiner
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Olik Chaudhuri

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