Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Pao-Ling Koh0
Yingda Dong0
Chris Avila0
Deepak Raghu0
Gautam Dusija0
Man Mui0
Date of Patent
January 6, 2015
0Patent Application Number
140441430
Date Filed
October 2, 2013
0Patent Citations Received
Patent Primary Examiner
Patent abstract
Erasing memory cells in certain 3-D NAND charge-storage memory arrays is achieved by rapidly charging vertical conductors using Gate Induced Drain Leakage (GIDL) current generated in select transistors. When bit line voltage drops below its nominal value, select line voltage is controlled to maintain a constant voltage difference between bit line voltage and select line voltage thus maintaining a gate-drain voltage difference in select transistors that provides sufficient GIDL current for erase.
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