US Patent 9147665 High bond line thickness for semiconductor devices

Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using a boundary feature(s) containing a bond wire to define a perimeter on the die attach pad, depositing a conductive material (such as solder) within the perimeter, and then attaching a die containing an integrated circuit device to the die attach pad by using the conductive material. The boundary feature(s) allow an increased thickness of conductive material to be used, resulting in increased bond line thickness and increasing the durability and performance of the resulting semiconductor package. Other embodiments are described.