US Patent 9236864 Stacked integrated circuit with redundancy in die-to-die interconnects
Patent 9236864 was granted and assigned to Altera on January, 2016 by the United States Patent and Trademark Office.
Is a
Current Assignee
Date Filed
January 17, 2012
0
Date of Patent
January 12, 2016
0
Patent Application Number
13352212
0
Patent Citations Received
Patent Inventor Names
Chooi Pei Lim
0
Siang Poh Loh
0
Patent Jurisdiction
Patent Number
Patent Primary Examiner
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