Patent attributes
Provided is a method of forming a semiconductor device. The method includes providing a substrate having n-type doped source/drain features; depositing a flowable dielectric material layer over the substrate; and performing a wet annealing process to the flowable dielectric material layer. The wet annealing process includes a first portion performed at a temperature below 600 degrees Celsius (° C.) and a second portion performed at temperatures above 850° C. wherein the second portion is performed for a shorter duration than the first portion. In embodiments, the second portion has a spike temperature ramp profile with a peak temperature ranging from about 900° C. to about 1,050° C. and a spike duration ranging from about 0.7 seconds to about 10 seconds. The wet annealing process satisfies thermal budget for converting the flowable dielectric material layer to a dense oxide layer while maintaining tensile strain in an n-channel between the doped source/drain features.
