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US Patent 9318594 Semiconductor devices including implanted regions and protective layers

Patent 9318594 was granted and assigned to Wolfspeed on April, 2016 by the United States Patent and Trademark Office.

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Patent abstract

A semiconductor structure includes a Group III-nitride semiconductor layer, a protective layer on the semiconductor layer, a distribution of implanted dopants within the semiconductor layer, and an ohmic contact extending through the protective layer to the semiconductor layer.

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Patent Citations Received

US Patent 11791389 Radio frequency transistor amplifiers having widened and/or asymmetric source/drain regions for improved on-resistance performance

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Patent Citations Received

US Patent 11784236 Methods for forming semiconductor devices using sacrificial capping and insulation layers

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Patent Inventor Names

Adam Saxler0

Scott T. Sheppard0

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Patent Citations Received

US Patent 11749726 Field effect transistor with source-connected field plate

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Patent Citations Received

US Patent 11658234 Field effect transistor with enhanced reliability

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Official Website

https://pdfpiw.uspto.gov/.piw?Docid=09318594

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US Patent 09318594 Semiconductor devices including implanted regions and protective layers US Patent 9318594 Semiconductor devices including implanted regions and protective layers

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Patent Number

09318594

Patent Number

9318594

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Website URL

https://pdfpiw.uspto.gov/.piw?Docid=09318594

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US Patent 09318594 Semiconductor devices including implanted regions and protective layers

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Is a

Current assignee

Patent jurisdiction

United States Patent and Trademark Office

Patent number

09318594

Date of patent

April 19, 2016

Patent application number

12186106

Date Filed

August 5, 2008

Patent primary examiner

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