Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Chang-Yun Chang0
Jhon-Jhy Liaw0
Date of Patent
June 7, 2016
0Patent Application Number
127021770
Date Filed
February 8, 2010
0Patent Citations Received
Patent Primary Examiner
Patent abstract
A system and method for a memory cell layout is disclosed. An embodiment comprises forming dummy layers and spacers along the sidewalls of the dummy layer. Once the spacers have been formed, the dummy layers may be removed and the spacers may be used as a mask. By using the spacers instead of a standard lithographic process, the inherent limitations of the lithographic process can be avoided and further scaling of FinFET devices can be achieved.
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