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US Patent 9362290 Memory cell layout
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Patent
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Date Filed
February 8, 2010
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Date of Patent
June 7, 2016
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Patent Application Number
12702177
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Patent Citations Received
US Patent 11955486 Integrated circuit device and method of forming the same
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US Patent 11764112 Methods for fabricating FinFETs having different fin numbers and corresponding FinFETs thereof
Patent Inventor Names
Chang-Yun Chang
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Jhon-Jhy Liaw
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Patent Jurisdiction
United States Patent and Trademark Office
0
Patent Number
9362290
0
Patent Primary Examiner
Mohammed Shamsuzzaman
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