Is a
Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
October 11, 2016
Patent Application Number
14166257
Date Filed
January 28, 2014
Patent Citations Received
Patent Primary Examiner
Patent abstract
Disclosed is a method of forming array substrates having a peripheral wiring area and a display area. The method is processed by only three lithography processes with two multi-tone photomasks and one general photomask. In the peripheral wiring area, the top conductive line directly contacts the bottom conductive line without any other conductive layer. The conventional lift-off process is eliminated, thereby preventing a material (not dissolved by a stripper) from suspending in the stripper or remaining on the array substrate surface.
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