US Patent 9520356 Circuit with reduced noise and controlled frequency
Patent 9520356 was granted and assigned to Analog Devices on December, 2016 by the United States Patent and Trademark Office.
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Patent abstract
A die is packaged by flip-chip mounting the die with the active side facing a low loss substrate. A ground plane is coupled to the active side of the die by vias through the low loss substrate. The ground plane is positioned to concentrate high frequency electromagnetic fields in the low loss substrate. A tuning height can be adjusted to tune the center frequency of a circuit in the die.
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US Patent 09520356 Circuit with reduced noise and controlled frequency US Patent 9520356 Circuit with reduced noise and controlled frequency
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Patent Number
0952035600
Patent Number
952035600
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Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
095203560
Date of Patent
December 13, 2016
0Patent Application Number
148493950
Date Filed
September 9, 2015
0Official Website
Patent Primary Examiner
Edits on 28 Sep, 2022
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Infobox
Is a
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
095203560
Date of Patent
December 13, 2016
0Patent Application Number
148493950
Date Filed
September 9, 2015
0Official Website
Patent Primary Examiner
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US Patent 09520356 Circuit with reduced noise and controlled frequency
Infobox
Is a
Patent applicant
Current assignee
Patent jurisdiction
Patent number
09520356
Date of patent
December 13, 2016
Patent application number
14849395
Date Filed
September 9, 2015
Patent primary examiner
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