Patent attributes
Memory cells and methods for forming a memory cell are disclosed. The memory cell includes a substrate defined with a memory cell region. A cell selector unit is defined on the substrate. The cell selector unit includes at least one select transistor. A storage element which includes a magnetic tunnel junction (MTJ) element is coupled to the selector unit. The MTJ element includes a free layer, a fixed layer and a tunnel barrier sandwiched between the fixed and free layers. A spin-orbit-torque (SOT) layer is coupled to the selector unit and is in direct contact with the free layer. A strain induced layer is coupled to a digital line (DL) and is in direct contact with the SOT layer. When the DL is activated, an electric field applied to the strain induced layer induces a strain on the SOT layer.
