Patent attributes
A storage device includes first and second data transceivers connected to an upper level device through first and second paths, respectively, and a third processor. The first data transceiver includes a first processor configured to perform an access control of a first logical memory group by executing first firmware. The second data transceiver performs an access control of a second logical memory group. The third processor is configured to change, when all of logical memories included in the first logical memory group are included in the second logical memory group, recommendation levels of the first path and the second path such that a first recommendation level of the first path is lower than a second recommendation level of the second path if the first recommendation level is higher than or equal to the second recommendation level, and update the first firmware when no data is flowing through the first path.
