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US Patent 9698081 3D chip-on-wafer-on-substrate structure with via last process

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
September 13, 2016
Date of Patent
July 4, 2017
Patent Application Number
15264245
Patent Citations Received
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US Patent 12129168 Microelectronics package with vertically stacked MEMS device and controller device
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US Patent 12112999 RF devices with enhanced performance and methods of forming the same
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US Patent 12125739 RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation
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US Patent 12125825 RF devices with enhanced performance and methods of forming the same
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US Patent 11705362 RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation
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US Patent 11705428 RF devices with enhanced performance and methods of forming the same
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US Patent 11710704 RF device without silicon handle substrate for enhanced thermal and electrical performance and methods of forming the same
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US Patent 11710680 RF devices with enhanced performance and methods of forming the same
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US Patent 11710714 RF devices with enhanced performance and methods of forming the same
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US Patent 11842939 Thermally enhanced semiconductor package with at least one heat extractor and process for making the same
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•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
9698081
Patent Primary Examiner
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Telly Green

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