Patent attributes
Apparatus and methods for electrostatic discharge (ESD) protection of radio frequency circuits are provided. In certain configurations, an ESD protection circuit includes two or more pairs of field effect transistors (FETs) electrically connected in series between a radio frequency signal pin and a radio frequency ground pin. Each of the two or more pairs of FETs includes a negative ESD protection FET for providing protection from negative polarity ESD events and a positive ESD protection FET for providing protection from positive polarity ESD events. The source and gate of the negative ESD protection FET are electrically connected to one another, and the source and gate of the positive ESD protection FET are electrically connected to one another. Additionally, the drains of the negative and positive ESD protection FETs are electrically connected to one another. The ESD protection circuit exhibits a relatively low capacitance and flat capacitance versus voltage characteristic.