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Patent primary examiner of
‌
US Patent 7089402 Instruction execution control for very long instruction words computing architecture based on the free state of the computing function units
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US Patent 7089411 Method and apparatus for providing device information during runtime operation of a data processing system
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US Patent 7089412 Adaptive memory module
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US Patent 7089431 Data processing system for reducing wasteful power consumption
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US Patent 7089432 Method for operating a processor at first and second rates depending upon whether the processor is executing code to control predetermined hard drive operations
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US Patent 7089435 Storage unit having normal and backup power sources for use in retaining data when normal power fails
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US Patent 7093116 Methods and apparatus to operate in multiple phases of a basic input/output system (BIOS)
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US Patent 7093117 Method for automatically getting control data from BIOS
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US Patent 7093147 Dynamically selecting processor cores for overall power efficiency
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US Patent 7093151 Circuit and method for providing a precise clock for data communications
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US Patent 7096349 Firmware algorithm for initializing memory modules for optimum performance
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US Patent 7096376 Device and method for ensuring that a signal always reaches its destination after a fixed number of clock cycles
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US Patent 7096377 Method and apparatus for setting timing parameters
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US Patent 7096469 Method and apparatus for enforcing capacity limitations in a logically partitioned system
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US Patent 7100038 System and method for device parameter persistence
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US Patent 7100056 System and method for managing processor voltage in a multi-processor computer system for optimized performance
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US Patent 7100060 Techniques for utilization of asymmetric secondary processing resources
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US Patent 7100065 Controller arrangement for synchronizer data transfer between a core clock domain and bus clock domain each having its own individual synchronizing controller
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US Patent 7103594 System and method for information retrieval employing a preloading procedure
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US Patent 7103761 Server system with multiple management user interfaces
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US Patent 7103766 System and method for making BIOS routine calls from different hardware partitions
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US Patent 7103786 Method of portable computer power management using keyboard controller in detection circuit
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US Patent 7103787 Method for discovering power consumption in hardcopy output device by adding idle power consumption to outputting power consumption of hardcopy output device
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US Patent 7103792 Information processing system has clock lines which are electrically isolated from another clock line electrically connected to clock buffer and termination voltage
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US Patent 7107467 Semiconductor memory device having a circuit for removing noise from a power line of the memory device using a plurality of decoupling capactors
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US Patent 7107475 Digital delay locked loop with extended phase capture range
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US Patent 7111158 Techniques for transitioning control of a serial ATA device among multiple hosts using sleep and wake commands
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US Patent 7111159 Quick starting external programmer for implantable medical device
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US Patent 7111177 System and method for executing tasks according to a selected scenario in response to probabilistic power consumption information of each scenario
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US Patent 7111180 Information handling system interrupting current to external module if current exceeds different current limits when handling system receives current from battery and alternating current source
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US Patent 7111185 Synchronization device with delay line control circuit to control amount of delay added to input signal and tuning elements to receive signal form delay circuit
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US Patent 7111186 Method and apparatus for static phase offset correction
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US Patent 7111297 Methods and architectures for resource management
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US Patent 7114085 Portable storage device startup
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US Patent 7114087 Method to detect a temperature change by a thermal monitor and compensating for process, voltage, temperature effects caused by the temperature change
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US Patent 7114091 Synchronization of distributed systems
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US Patent 7114160 Web content customization via adaptation Web services
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US Patent 7117384 Timing method and apparatus for digital logic circuits
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US Patent 7120162 System and method for processing audio and video data in a wireless handset
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US Patent 7120803 Portable appliance for reproducing a musical composition, power saving method, and storage medium therefor
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US Patent 7120805 Draining residual charge from a voltage plane
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US Patent 7124291 System and method for eliminating static initialization overhead by memory space cloning of a master runtime system process
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US Patent 7124310 System including a computer and a fuel cell that communicates with the computer and supplies power to the computer
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US Patent 7124314 Method and apparatus for fine tuning clock signals of an integrated circuit
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US Patent 7124315 Blade system for using multiple frequency synthesizers to control multiple processor clocks operating at different frequencies based upon user input
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US Patent 7127605 Secure sharing of application methods on a microcontroller
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US Patent 7127625 Application management based on power consumption
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US Patent 7130997 Method of registering a portion of RAM with firmware to preserve the portion during reboot
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US Patent 7131012 Method and apparatus for correlating an out-of-range condition to a particular power connection
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US Patent 7131013 Power supply control system and storage device for holding data just prior to the occurence of an error
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US Patent 7131015 Performance level selection in a data processing system using a plurality of performance request calculating algorithms
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US Patent 7134036 Processor core clock generation circuits
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US Patent 7136993 Method and system for remote or local access to keyboard control in legacy USB mode with a UHCI USB controller
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US Patent 7139921 Low power clocking systems and methods
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US Patent 7139924 IDE control device suitable for supplying a plurality of requested clock signals to various hard discs
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US Patent 7140015 Microkernel for real time applications
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US Patent 7143410 Synchronization mechanism and method for synchronizing multiple threads with a single thread
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US Patent 7146511 Rack equipment application performance modification system and method
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US Patent 7146513 System for adjusting a clock frequency based on comparing a required process times and a worst case execution times and adjusting a voltage and clock frequency based on a number of ready state application tasks
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US Patent 7149905 Firmware controlled dynamic voltage adjustment
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US Patent 7149916 Method for time-domain synchronization across a bit-sliced data path design
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US Patent 7152169 Method for providing power management on multi-threaded processor by using SMM mode to place a physical processor into lower power state
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US Patent 7152172 Method and apparatus for real time monitoring of user presence to prolong a portable computer battery operation time
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US Patent 7155626 Data processor including clock thinning-out circuit
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US Patent 7159135 Method and apparatus for controlling a multi-mode I/O interface to enable an I/O buffer to transmit and receive data according to an I/O protocol
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US Patent 7162629 Method to suspend-and-resume across various operational environment contexts
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US Patent 7165185 DDR II write data capture calibration
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US Patent 7167974 Multiple saved kernel configurations
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US Patent 7167990 Interfacing circuit for reducing current consumption
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US Patent 7167995 Robust and scalable de-skew method
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US Patent 7167996 Micro controller unit
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US Patent 7171548 Method for managing resources in a reconfigurable computer having programmable logic resources where automatically swapping configuration data between a secondary storage device and the programmable logic resources
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US Patent 7171549 Information processing apparatus for start-up of an operating system using three different initialization modes in a specific sequence
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US Patent 7171579 Method and device for exchanging data between at least two stations connected via a bus system
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US Patent 7174446 System and method for managing the boot sequence of an information handling system
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US Patent 7174473 Start detection circuit, stop detection circuit and circuit for the detection of data transmitted according to the IIC protocol
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US Patent 7174552 Method of accessing a resource by a process based on a semaphore of another process
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US Patent 7178015 Security measures in a partitionable computing system
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US Patent 7178048 System and method for signal synchronization based on plural clock signals
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US Patent 7181630 Uninterrupted power supply managing system displays connection tree generated from connection information between interrupted power supply device and load devices received from lower controller
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US Patent 7185214 System and method for load dependent frequency and performance modulation in bladed systems
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US Patent 7185216 System for synchronizing first and second sections of data to opposing polarity edges of a clock
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US Patent 7185219 System and method for clock phase recovery
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US Patent 7185220 Information exchange between locally synchronous circuits
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US Patent 7188263 Method and apparatus for controlling power state of a multi-lane serial bus link having a plurality of state transition detectors wherein powering down all the state transition detectors except one
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US Patent 7188265 Method of recognizing a card using a select signal during a determination mode and switching from low to high resistance after the determination
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US Patent 7188267 Semiconductor device having a first clock signal configured to operate sychronously with a second clock signal by use of a measuring and setting circuit
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US Patent 7188268 Method and apparatus for synchronous loading and out-of-phase unloading of data registers
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US Patent 7188344 Architecture for a read/write thread lock
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US Patent 7194612 System and method to export pre-boot system access data to be used during operating system runtime
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US Patent 7197658 Synchronizing samples of a multimedia stream with a system clock
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US Patent 7197675 Method and apparatus for determining the write delay time of a memory utilizing the north bridge chipset as in charge of the works for checking the write delay time of the memory
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US Patent 7203850 Power management for a network utilizing a vertex/edge graph technique
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US Patent 7203854 System for reconfiguring a computer between a high power and high functionality configuration and a low power and low functionality configuration
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US Patent 7203855 Power-saving control circuitry of electronic device and operating method thereof
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US Patent 7206945 Parallel distributed sample descrambling apparatus of passive optical network and method thereof
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US Patent 7206950 Processor system, instruction sequence optimization device, and instruction sequence optimization program
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US Patent 7206958 Determining cycle adjustments for static timing analysis of multifrequency circuits
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US Patent 7210031 Electronic apparatus using a memory controller to write control parameter in a nonvolatile memory into dual port RAM in accordance with power on
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US Patent 7210032 Method for initializing multifunction handheld device by downloading second boot algorithm from a coupled host if second boot algorithm in the handheld device is not executable
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US Patent 7210047 Method of switching modes of a computer operating in a grid environment based on the current operating mode
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US Patent 7210049 Controller area network wake-up system and method
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US Patent 7210052 Method and system for synchronizing all clock sources of semiconductor devices
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US Patent 7216222 System and method for writing data from a storage means to a memory module in a solid state disk system
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US Patent 7216241 Self-testing power supply which indicates when an output voltage is within tolerance while not coupled to an external load
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US Patent 7216243 System and method for selecting a power mode for a device based on the devices operating state at each of a plurality of sampling time units
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US Patent 7216244 Data storage system with redundant storage media and method therefor
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US Patent 7216250 Clock control circuit for correcting frequency of second clock signal based on first clock signal and monitoring oscillation state of first clock signal based on second clock signal
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US Patent 7219241 Method for managing virtual and actual performance states of logical processors in a multithreaded processor using system management mode
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US Patent 7219242 Direct plane access power delivery
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US Patent 7219246 Digital system having selectable clock speed based upon available supply voltage and PLL configuration register settings
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US Patent 7222246 Method for determining number of dynamically temperature-adjusted power supply units needed to supply power according to measure operating temperature of power supply units
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US Patent 7222248 Method of switching voltage islands in integrated circuits when a grid voltage at a reference location is within a specified range
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US Patent 7222250 Display unit and power save controller
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US Patent 7222253 Dynamic power control for reducing voltage level of graphics controller component of memory controller based on its degree of idleness
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US Patent 7222254 System and method for over-clocking detection of a processor utilizing a feedback clock rate setting
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US Patent 7225346 Information processor, program, storage medium, and control method
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US Patent 7225352 Method of terminating a screen saver and re-creating image data of a display memory upon power restoration from an idle state
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US Patent 7225354 Circuit and method for aligning transmitted data by adjusting transmission timing for a plurality of lanes
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US Patent 7228442 Method and systems for a radiation tolerant bus interface circuit
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US Patent 7228450 Method and device for the formation of clock pulses in a bus system having at least one station, bus system and station
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US Patent 7228451 Programmable clock network for distributing clock signals to and between first and second sections of an integrated circuit
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US Patent 7231530 System and method for saving power in a wireless network by reducing power to a wireless station for a time interval if a received packet fails an integrity check
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US Patent 7231533 Wake-up reset circuit draws no current when a control signal indicates sleep mode for a digital device
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US Patent 7234051 Method and apparatus for booting from a selection of multiple boot images
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US Patent 7234053 Methods for expansive netboot
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US Patent 7234055 Computer operating booting system making use of multi-buttons
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US Patent 7234068 Trace data and power measurement data matching apparatus and method that adds synchronization markers
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US Patent 7234071 On-chip realtime clock module has input buffer receiving operational and timing parameters and output buffer retrieving the parameters
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US Patent 7237106 System for loading configuration data into a configuration word register by independently loading a plurality of configuration blocks through a plurality of configuration inputs
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US Patent 7237132 Power reduction for unintentional activation of a wireless input device using a flip-flop to detect event termination
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US Patent 7237135 Cyclemaster synchronization in a distributed bridge
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US Patent 7240190 Resource compatible system for computer system reads compressed filed stored in legacy BIOS and decompresses file using legacy support operating system driver
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US Patent 7240223 Method and apparatus for dynamic power management in a processor system
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US Patent 7240228 Method and system for standby auxiliary processing of information for a computing device
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US Patent 7240232 Connection device capable of converting a pixel clock to a character clock
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US Patent 7243222 Storing data related to system initialization in memory while determining and storing data if an exception has taken place during initialization
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US Patent 7246229 Predicting the health of a system that would result from the application of a proposed intervention to an existing system
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US Patent 7246249 Reproduction control of reproduction apparatus based on remaining power of battery
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US Patent 7246250 Memory device controls delay time of data input buffer in response to delay control information based on a position of a memory device received from memory controller
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US Patent 7249249 Dynamic hardfile size allocation to secure data
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US Patent 7249253 Booting from a re-programmable memory on an unconfigured bus
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US Patent 7249269 Method of pre-activating network devices based upon previous usage data
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US Patent 7249270 Method and apparatus for placing at least one processor into a power saving mode when another processor has access to a shared resource and exiting the power saving mode upon notification that the shared resource is no longer required by the other processor
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US Patent 7251727 System and method for surely but conveniently causing reset of a computerized device
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US Patent 7251737 Convergence device with dynamic program throttling that replaces noncritical programs with alternate capacity programs based on power indicator
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US Patent 7251738 Method of remotely controlling power to an information handling system via a peripheral bus after a loss of power
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US Patent 7254703 Methods and apparatus for acquiring and displaying expansion read only memory size information
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US Patent 7254722 Trusted platform motherboard having physical presence detection based on activation of power-on-switch
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US Patent 7254725 Method for the power-saving control of a receiving device, in particular for an access control system for an automobile, and a corresponding receiving device
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US Patent 7254728 Power saving circuit having a keeper stage to hold a signal line in a weakly held state
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US Patent 7254733 Method of shutting down virtual machines in an orderly manner
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US Patent 7254735 Data processing system with block control circuits using self-synchronization handshaking and local clock/power control based on detected completion within subblocks
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US Patent 7254736 Systems and method providing input/output fencing in shared storage environments
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US Patent 7257702 Boot time reducing device including boot preparation instructing unit
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US Patent 7257704 Method of selectively loading a pre-boot execution extension determined based on an identifier
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US Patent 7257705 Method for preserving changes made during a migration of a system's configuration to a second configuration
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US Patent 7257725 Memory system
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US Patent 7257728 Method and apparatus for an integrated circuit having flexible-ratio frequency domain cross-overs
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US Patent 7257815 Methods and system of managing concurrent access to multiple resources
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US Patent 7260728 Windows-based power management method and related portable device
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US Patent 7260730 Remote power configuration of functions within multifunction apparatus using status and setting screens displayed on external apparatus
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US Patent 7260731 Saving power when in or transitioning to a static mode of a processor
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US Patent 7260734 Method and circuit for transmitting data between systems having different clock speeds
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US Patent 7260735 Method and system for maintaining a running count of events updated by two asynchronous processes
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US Patent 7263605 Decoupled hardware configuration manager that generates a user interface prior to booting using hardware configuration option data read from plurality of hardware devices
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US Patent 7263621 System for reducing power consumption in a microprocessor having multiple instruction decoders that are coupled to selectors receiving their own output as feedback
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US Patent 7266677 Application modifier based on operating environment parameters
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US Patent 7266711 System for storing data within a raid system indicating a change in configuration during a suspend mode of a device connected to the raid system
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US Patent 7269721 Method, system, and apparatus for booting with remote configuration data
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US Patent 7269724 Remote field upgrading of programmable logic device configuration data via adapter connected to target memory socket
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US Patent 7269748 System for preventing errors upon ejection of a memory card from a slot
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US Patent 7269749 System for controlling low power mode of TV by using single output pin of microprocessor to send signals to demagnetization circuit and switched mode power supply
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US Patent 7269750 Method and apparatus for reducing power consumption in a graphics controller
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US Patent 7272729 Data carrier for processing signal stream according to transmission protocols has an active processing circuit and a passive signal processing circuit with power supplies
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US Patent 7272731 Information handling system having reduced power consumption
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US Patent 7272742 Method and apparatus for improving output skew for synchronous integrated circuits
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US Patent 7272832 Method of protecting user process data in a secure platform inaccessible to the operating system and other tasks on top of the secure platform
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US Patent 7275152 Firmware interfacing with network protocol offload engines to provide fast network booting, system repurposing, system provisioning, system manageability, and disaster recovery
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US Patent 7275153 Booting and boot code update system using boot strapper code to select between a loader and a duplicate backup loader
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US Patent 7275164 System and method for fencing any one of the plurality of voltage islands using a lookup table including AC and DC components for each functional block of the voltage islands
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US Patent 7275168 System and method for providing clock signals based on control signals from functional units and on a hibernate signal
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US Patent 7278032 Circuit and operating method for integrated interface of PDA and wireless communication system
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US Patent 7278033 Method and a system for determining the power consumption in connection with an electronic device, and an electronic device
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US Patent 7278041 Data processing system and method
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US Patent 7278046 Circuit and method for outputting aligned strobe signal and parallel data signal
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US Patent 7281127 Concurrent processing of operations in a boot sequence to initialize a storage device including an operating system loader to load
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US Patent 7281142 Apparatus, system, and method for securely providing power supply commands
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US Patent 7281143 Method of controlling power by a power controller controlling a power switch of an unused communication interface
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US Patent 7281149 Systems and methods for transitioning a CPU from idle to active
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US Patent 7281151 Method of stopping data communication of a communication apparatus based on a detection of a power supply voltage drop
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US Patent 7284137 System and method for managing power consumption within an integrated circuit
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US Patent 7284144 Finite state machine interface has arbitration structure to store command generated by internal circuits during evaluation phase of state machine for FLASH EEPROM device
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US Patent 7287155 Storage control system and boot control system
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US Patent 7287172 System and method for locking user input elements for small computer devices
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US Patent 7287173 Method for computing power consumption levels of instruction and recompiling the program to reduce the excess power consumption
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US Patent 7290125 Method for scheduling launch a computer system based upon a time of timed power-on partition of logical partitions
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US Patent 7290126 One-chip microcomputer with multiple timers
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US Patent 7290128 Fault resilient boot method for multi-rail processors in a computer system by disabling processor with the failed voltage regulator to control rebooting of the processors
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US Patent 7290157 Configurable processor with main controller to increase activity of at least one of a plurality of processing units having local program counters
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US Patent 7290158 Method of controlling data transfer within a semiconductor integrated circuit based on a clock sync control signal
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US Patent 7290162 Clock distribution system
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US Patent 7290163 Method and circuit for deciding data transfer rate
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US Patent 7293170 Changing the personality of a device by intercepting requests for personality information
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US Patent 7293183 System for storing working context in a non-volatile memory while in a power-off suspend mode and restoring the working context when the power-off suspend mode is released
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US Patent 7293184 Programmatic binding for power management events involving execution of instructions in a first programming system with a first interface and a second programming system with a second interface
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US Patent 7293185 Clock control circuit and clock control method that switchingly supplies a high-speed clock and a low-speed clock
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US Patent 7296165 Method for power down interrupt in a data modem
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US Patent 7296166 Disk array system for starting destaging process of unwritten cache memory data to disk drive upon detecting DC voltage level falling below predetermined value
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US Patent 7302558 Systems and methods to facilitate the creation and configuration management of computing systems
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US Patent 7302597 Microprocessors with improved efficiency processing a variant signed magnitude format
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US Patent 7308585 Low power residual remaining power indicator
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US Patent 7308589 Controlling power consumption peaks in electronic circuits
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US Patent 7308592 Redundant oscillator distribution in a multi-processor server system
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US Patent 7310739 Universal serial bus and method for transmitting serial clock and serial data signals during power-saving mode
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US Patent 7310741 Phase adjusted delay loop executed by determining a number of NOPs based on a modulus value
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US Patent 7313682 Method and system for updating boot memory that stores a fail-safe reset code and is configured to store boot code and boot updater code
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US Patent 7313711 Adaptive power management in portable entertainment device
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US Patent 7313714 System and method for managing groups of modular power supplies for powering subcomponents of a computer system
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US Patent 7315953 Apparatus and related method of coordinating north bridge and south bridge for processing bus master requests of peripheral devices for controlling a central processing unit to operate in a power-saving state
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US Patent 7318167 DDR II write data capture calibration
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US Patent 7320078 Controlling delivery of power and network communications to a set of devices
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US Patent 7321975 Method for controlling power supply to function modules selectively based on function modules necessary for predetermined program execution in mobile device
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US Patent 7321979 Method and apparatus to change the operating frequency of system core logic to maximize system memory bandwidth
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US Patent 7328334 Hardware initialization with or without processor intervention
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US Patent 7328357 Electronic apparatus with switching power supply controlled to stop main circuit voltage and reduce microcomputer voltage during standby mode
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US Patent RE40092 Method for quickly booting a computer system
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US Patent 7334118 Method for resetting a processor involves receiving CPU reset trigger signal from BIOS
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US Patent 7334142 Reducing power consumption in a logically partitioned data processing system with operating system call that indicates a selected processor is unneeded for a period of time
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US Patent 7334143 Computer power conservation apparatus and method that enables less speculative execution during light processor load based on a branch confidence threshold value
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US Patent 7334146 Method for controlling an image processing apparatus based on a power supply status
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US Patent 7334150 Memory module with a clock signal regeneration circuit and a register circuit for temporarily storing the incoming command and address signals
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US Patent 7337339 Multi-level power monitoring, filtering and throttling at local blocks and globally
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US Patent 7337343 Arrangement consisting of a program-controlled unit and a power chip connected to it
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US Patent 7337347 Information processing system and method for timing adjustment
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US Patent 7340620 Rapid load reduction for power-over-LAN system using lower and higher priority states for ports
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US Patent 7340634 Real time clock architecture and/or method for a system on a chip (SOC) application
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US Patent 7343504 Micro controller unit (MCU) with RTC
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US Patent 7343507 Input circuit and method for the operation thereof
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US Patent 7346790 Remote power cycling of peripheral data storage system
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US Patent 7346791 Method for controlling a clock frequency of an information processor in accordance with the detection of a start and a end of a specific processing section
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US Patent 7346793 Synchronization of multiple operational flight programs
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US Patent 7346796 Streaming output peripherals for programmable chip systems
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US Patent 7350089 System for memory hot swap
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US Patent 7350091 Control apparatus for controlling a plurality of computers
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US Patent 7353410 Method, system and calibration technique for power measurement and management over multiple time frames
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US Patent 7353412 Electrical circuit for controlling power supply and motor vehicle built-in device being operably connected to an external power supply
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US Patent 7353413 Computer system power policy adjustment in response to an affirmative indication from a user
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US Patent 7353414 Credit-based activity regulation within a microprocessor based on an allowable activity level
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US Patent 7353417 Microcontroller with synchronised analog to digital converter
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US Patent 7356685 System and method for enabling automated run-time input to network bootstrapping processes
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US Patent 7356726 Frequency control apparatus for controlling the operation frequency of an object
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US Patent 7360071 Method to establish contexts for use during automated product configuration
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US Patent 7360074 Method for remote flashing of a bios memory in a data processing system
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US Patent 7360104 Redundant voltage distribution system and method for a memory module having multiple external voltages
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US Patent 7360107 Method of controlling power within a disk array apparatus
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US Patent 7360108 Multi-link receiver and method for processing multiple data streams
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US Patent 7363479 Methods and apparatus for provisioning servers to clients
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US Patent 7363485 Controlling advanced configuration and power interface control methods
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US Patent 7363517 Methods and apparatus to manage system power and performance
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US Patent 7363520 Techniques for providing power to a set of powerable devices
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US Patent 7366922 Power control for gaming machine
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US Patent 7370189 Method and apparatus for establishing safe processor operating points in connection with a secure boot
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US Patent 7370214 Automatically switching power supply sources for a clock circuit
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US Patent 7370218 Portable computer power control apparatus and method
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US Patent 7373493 Boot methods, computer systems, and production methods thereof
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US Patent 7373495 Hardware cross-emulation using personas
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US Patent 7373496 Operating system rebooting apparatus for continuing to execute a non-stop module even during rebooting
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US Patent 7373497 Methods and apparatus for rapidly activating previously inactive components in a computer system
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US Patent 7373528 Increased power for power over Ethernet applications
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US Patent 7373531 Signal detection method, frequency detection method, power consumption control method, signal detecting device, frequency detecting device, power consumption control device and electronic apparatus
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US Patent 7373533 Programmable I/O cell capable of holding its state in power-down mode
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US Patent 7373539 Parallel path alignment method and apparatus
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US Patent 7376823 Method and system for automatic detection, inventory, and operating system deployment on network boot capable computers
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US Patent 7376846 Charging and communication cable system for a mobile computer apparatus
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US Patent 7376854 System for enabling and disabling voltage regulator controller of electronic appliance according to a series of delay times assigned to voltage regulator controllers
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US Patent 7383430 System and method for validating resource groups
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US Patent 7383455 Method and apparatus for transferring multi-source/multi-sink control signals using a differential signaling technique
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US Patent 7383457 Adaptive power-reduction mode
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US Patent 7383458 Method and device for synchronizing the cycle time of a plurality of TTCAN buses based on determined global time deviations and corresponding bus system
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US Patent 7383460 Method and system for configuring a timer
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US Patent 7386739 Scheduling processor voltages and frequencies based on performance prediction and power constraints
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US Patent 7386747 Method and system for reducing power consumption of a programmable processor
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US Patent 7386749 Controlling sequence of clock distribution to clock distribution domains
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US Patent 7389438 Method for detecting temperature and activity associated with a processor and using the results for controlling power dissipation associated with a processor
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US Patent 7392372 Method for memory initialization involves detecting primary quantity of memories and setting optimum parameters based on hardware information of memories
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US Patent 7392374 Moving kernel configurations
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US Patent 7392411 Systems and methods for dynamic voltage scaling of communication bus to provide bandwidth based on whether an application is active
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US Patent 7392416 Method for controlling power consumption associated with a processor
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US Patent 7395439 Electronic circuit with energy control
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US Patent 7395442 Computer peripheral device, its control method, image pickup device, storage medium, computer system, and computer
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US Patent 7398384 Methods and apparatus for acquiring expansion read only memory size information prior to operating system execution
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US Patent 7398408 Systems and methods for waking up wireless LAN devices
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US Patent 7398414 Clocking system including a clock controller that uses buffer feedback to vary a clock frequency
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US Patent 7401213 Data communication apparatus and method of a device that supports plural communication methods
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US Patent 7401237 Power supplying method and apparatus and a system using the same
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US Patent 7401239 Internal powerline power supply method and system
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US Patent 7404095 Firmware controlled supply voltage adjustment
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US Patent 7404097 Vehicle-installed microcomputer system that interrupts power to higher accuracy power supply circuit for sensor A/D converter in sleep mode
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US Patent 7406613 Translation lookaside buffer (TLB) suppression for intra-page program counter relative or absolute address branch instructions
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US Patent 7412618 Combined alignment scrambler function for elastic interface
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US Patent 7421598 Dynamic power management via DIMM read operation limiter
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US Patent 7424635 System and method for power saving delay locked loop control by selectively locking delay interval
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US Patent 7424636 Method and apparatus for controlling a clock signal of a line card circuit
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US Patent 7426649 Power management via DIMM read operation limiter
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US Patent 7430661 System and method of storing user data in a partition file or using a partition file containing user data
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US Patent 7434075 Portable information processing apparatus and method of the same
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US Patent 7434077 Power control apparatus, electronic apparatus, and portable communications terminal
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US Patent 7437584 Apparatus and method for reducing power consumption in electronic devices
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US Patent 7437591 Method and apparatus for hardware timing optimizer
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US Patent 7447888 Method for restoring computer operating system
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US Patent 7447922 Supplying power from peripheral to host via USB
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US Patent 7451336 Automated load shedding of powered devices in a computer complex in the event of utility interruption
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US Patent 7454605 Method for adapter code image update
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US Patent 7454651 Main-board without restriction on memory frequency and control method thereof
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US Patent 7457972 South and north bridge and related computer system for supporting CPU
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US Patent 7464258 Method of displaying foreground visual data in foreground and executing system booting in background for computer system
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US Patent 7464278 Combining power prediction and optimal control approaches for performance optimization in thermally limited designs
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US Patent 7467137 System and method for information retrieval employing a preloading procedure
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US Patent 7467294 Microcomputer with mode decoder operable upon receipt of either power-on or external reset signal
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US Patent 7467315 Method for enabling power-saving mode
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US Patent 7469336 System and method for rapid boot of secondary operating system
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US Patent 7472290 Methods and apparatus to maintain and utilize mobile power profile information
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US Patent 7472296 Integrated circuit, semiconductor device and ID chip
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US Patent 7472298 Storage system and method for saving energy based on storage classes with corresponding power saving policies
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US Patent 7472302 Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay
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US Patent 7475236 Method for ensuring correct sub-system bios for specified system
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US Patent 7475265 Data storage device and control method for power-saving modes of serial interface thereof
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US Patent 7478260 System and method for setting a clock rate in a memory card
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US Patent 7480813 Portable electronic apparatus having a transfer mode for stopping an operating state of a device
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US Patent 7484108 Enhancing power delivery with transient running average power limits
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US Patent 7484109 Computer volatile memory power backup system
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US Patent 7487342 Method and apparatus for starting up and maintaining of multiple networked computing systems
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US Patent 7487345 Method of comparing build capability flags of replacement BIOS with boot capability flags of current BIOS to determine compatibility between BIOS revisions and installed hardware during flash update
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US Patent 7496744 Method for booting computer multimedia system with high speed data storage
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US Patent 7500113 Share circuit for normal electrical power
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US Patent 7500120 Apparatus has service processor determining interconnection between uninterruptible power supplies and system resources using configuration file that is stored in memory
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US Patent 7500122 Efficiency optimization method for hardware devices with adjustable clock frequencies
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US Patent 7500123 Apparatus and method for reducing power consumption in a graphics processing device
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US Patent 7500126 Arrangement and method for controlling power modes of hardware resources
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US Patent 7500128 Mobile systems with seamless transition by activating second subsystem to continue operation of application executed by first subsystem as it enters into sleep mode
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US Patent 7500132 Method of asynchronously transmitting data between clock domains
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US Patent 7502919 Method for selecting local or remote keyboard control in legacy USB mode within predetermined time
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US Patent 7502949 Data cable for automatically detecting power source with charger integrated circuit
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US Patent 7506142 Method for configuring device driver by customizing same user setting using in different image processing devices
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US Patent 7506192 Method and apparatus for adaptive power management of memory subsystem
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US Patent 7509504 Systems and methods for control of integrated circuits comprising body biasing systems
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US Patent 7509517 Clock transferring apparatus for synchronizing input data with internal clock and test apparatus having the same
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US Patent 7512774 Method and system for collecting processor information
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US Patent 7512820 Performance level selection in a data processing system by combining a plurality of performance requests
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US Patent 7516319 Method for booting a computer with second OS involves formatting portion of main memory with a second file system to generate ramdisk
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US Patent 7519809 Operating system-wide sandboxing via switchable user skins
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US Patent 7526661 Performance state-based thread management
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US Patent 7529949 Heterogeneous power supply management system
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US Patent 7529962 System for expanding a window of valid data
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US Patent 7549039 Generating an interrupt in a system having plural partitions that share a resource
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US Patent 7555639 Method for configuring a data formatting process using configuration values of a highest priority for each of a number of configuration keys storing in several configuration layers
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US Patent 7555641 Efficient resource mapping beyond installed memory space by analysis of boot target
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US Patent 7555642 Media transfer system and method
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US Patent 7555660 Electric-power management of at least one image forming apparatus to control power consumption of a building
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US Patent 7555666 Power profiling application for managing power allocation in an information handling system
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US Patent 7555670 Clocking architecture using a bidirectional clock port
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US Patent 7558950 Methods of configuring an electronic device to be operable with an electronic apparatus based on automatic identification thereof and related devices
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US Patent 7562237 Semiconductor integrated circuit device with internal power control system
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US Patent 7562241 Method for receiving inputs from user of electronic device
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US Patent 7571331 Means for preventing unintended powering of a first power over Ethernet controller
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US Patent 7571337 Integrated circuits and methods with transmit-side data bus deskew
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US Patent 7574590 Method for booting a system on a chip integrated circuit
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US Patent 7574593 Persistent memory manipulation using EFI
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US Patent 7574614 Method and apparatus for changing a digital processing system power consumption state by sensing peripheral power consumption
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US Patent 7577857 High speed network interface with automatic power management with auto-negotiation
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US Patent 7581119 Method and system for discovering a power source on a peripheral bus
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US Patent 7581129 Dynamic power control for reduced voltage level of graphics controller component of memory controller based on its degree of idleness
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US Patent 7584348 Techniques for configuring an embedded processor operating system
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US Patent 7584370 Circuits, switch assemblies, and methods for power management in an interface that maintains respective voltage differences between terminals of semiconductor devices in open and close switch states and over a range of voltages
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US Patent 7587586 Method, program, and system for setting up communication data for devices and supported applications
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US Patent 7590839 System employing fast booting of application programs
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US Patent 7594104 System and method for masking a hardware boot sequence
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US Patent 7596710 Synchronization circuit and method with transparent latches
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US Patent 7600137 Method for waking up a sleeping device, a related network element and a related waking device and a related sleeping device
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US Patent 7600142 Integrated circuit conserving power during transitions between normal and power-saving modes
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US Patent 7603575 Frequency-dependent voltage control in digital logic
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US Patent 7607000 Method for booting an operating system
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US Patent 7607004 System and method for surely but conveniently causing reset of a computerized device
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US Patent 7607028 Mitigate power supply noise response by throttling execution units based upon voltage sensing
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US Patent 7610480 System and method for controlling boot-up process in a communications network switch
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US Patent 7613940 Method and apparatus for controlling power supply to recording devices of redundant-array-of-independent-disks group
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US Patent 7613942 Power mode transition in multi-threshold complementary metal oxide semiconductor (MTCMOS) circuits
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US Patent 7617408 System and method for providing accurate time generation in a computing device of a power system
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US Patent RE40990 Data transmission across asynchronous time domains using phase-shifted data packet
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US Patent 7620805 Apparatus for updating program in a fuel cell unit
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US Patent 7620826 Thermal throttling duty estimation methods and systems for a CPU
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US Patent 7620832 Method and apparatus for masking a microprocessor execution signature
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US Patent 7620833 Power saving for isochronous data streams in a computer system
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US Patent 7620838 Semiconductor integrated circuit and image processing system using the same
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US Patent 7624291 Power optimized multi-mode voltage regulator
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US Patent 7627773 Logic circuit and semiconductor integrated circuit
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US Patent 7631176 Resistor/capacitor based identification detection
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US Patent 7631178 Independent main partition reset
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US Patent 7631201 System software for managing power allocation to Ethernet ports in the absence of mutually exclusive detection and powering cycles in hardware
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US Patent 7634647 Data storage system for setting operation parameter of host system according to operating system of host system
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US Patent 7640424 Initialization of flash storage via an embedded controller
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US Patent 7644291 Device throttling system from neighboring device
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US Patent 7647520 Electronic device for generating synchronization signals
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US Patent 7650517 Throttle management for blade system
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US Patent 7650525 SPI-4.2 dynamic implementation without additional phase locked loops
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US Patent 7653823 Method and apparatus for informing computer of power environment
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US Patent 7653826 Method and apparatus for query optimization and management of sleepy drives
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US Patent 7660978 System and method to provide device unique diagnostic support with a single generic command
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US Patent 7669066 Disk array system having plural disk drives that controls supplying of power to a disk drive having finished a destaging process on a disk drive by disk drive basis
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US Patent 7669069 Control of link supply power based on link port mode
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US Patent 7676686 Delay locked loop circuit and synchronous memory device including the same
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US Patent 7681028 Proactive rebooting in a set-top terminal and corresponding methods
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US Patent 7681055 Control device and method for a substrate processing apparatus
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US Patent 7681058 Information processing apparatus and power supply control method
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US Patent 7681065 Method and system for a message processor switch for performing incremental redundancy in edge compliant terminals
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US Patent 7681066 Quantifying core reliability in a multi-core system
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US Patent 7685441 Power control unit with digitally supplied system parameters
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US Patent 7685444 Power saving in circuit functions through multiple power buses
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US Patent 7685445 Per die voltage programming for energy efficient integrated circuit (IC) operation
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US Patent 7685446 Dynamic voltage scaling method of CPU using workload estimator and computer readable medium storing the method
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US Patent 7689844 Credit-based activity regulation within a microprocessor based on an accumulative credit system
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US Patent 7689845 Component reliability budgeting system
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US Patent 7689849 Reduction of power consumption by throttling processor requests
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US Patent 7694125 System and method of booting an operating system in an optimal performance state
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US Patent 7694160 Method and apparatus for optimizing power consumption in a multiprocessor environment
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US Patent 7694162 Conserving power by reducing voltage supplied to an instruction-processing portion of a processor
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US Patent 7698580 Inline power policing
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US Patent 7698585 Apparatus, system, and method for reducing idle power in a power supply
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US Patent 7702893 Integrated circuits with configurable initialization data memory addresses
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US Patent 7702938 Method and apparatus for implementing a hybrid power management mode for a computer with a multi-core processor
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US Patent 7707448 Deterministic test strand unparking
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US Patent 7707450 Time shared memory access
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US Patent 7716500 Power source dependent program execution
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US Patent 7721122 Power distribution system including a control module and a method of using the system
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US Patent 7725704 Techniques for performing a prioritized data restoration operation
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US Patent 7734903 Multi-processor system and method for controlling reset and processor ID thereof
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US Patent 7734939 Adaptive voltage adjustment
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US Patent 7734940 Data communication device has data signal generation circuit and transmission circuit on basis of reference voltage and received signal
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US Patent 7734941 Power management scheme employing an indicator of a current device operating configuration that requires a minimum processing power
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US Patent 7739489 Method and system for automatic detection, inventory, and operating system deployment on network boot capable computers
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US Patent 7739525 Device and system for controlling parallel power sources coupled to a load
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US Patent 7752473 Providing a deterministic idle time window for an idle state of a device
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US Patent 7752474 L1 cache flush when processor is entering low power mode
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US Patent 7757072 Method and apparatus for presenting drivers stored on utility partition of hard disk through virtual floppy to operating system installer
‌
US Patent 7761725 Clock generation for synchronous circuits with slow settling control signals
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US Patent 7765415 Semiconductor integrated circuit
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US Patent 7765416 Control device for a power supply with zero power consumption in standby mode
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US Patent 7765425 Incrementally adjustable skew and duty cycle correction for clock signals within a clock distribution network
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US Patent 7769993 Method for ensuring boot source integrity of a computing system
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US Patent 7770046 Management of time information within a plurality of execution spaces
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US Patent 7770049 Controller for clock skew determination and reduction based on a lead count over multiple clock cycles
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US Patent 7770050 Method and apparatus for resolving clock management issues in emulation involving both interpreted and translated code
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US Patent 7774588 Host build and rebuild system and method
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US Patent 7774591 Data processing device and data processing method
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US Patent 7774628 Enabling/disabling power-over-ethernet software subsystem in response to power supply status
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US Patent 7779286 Design tool clock domain crossing management
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US Patent 7779288 High resolution timer circuit and time count method for suppressing increase in storage capacity
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US Patent 7783872 System and method to enable an event timer in a multiple event timer operating environment
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US Patent 7783878 Methods for decoupling hardware settings from software
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US Patent 7783910 Method and system for associating power consumption of a server with a network address assigned to the server
‌
US Patent 7793117 Method, apparatus and system for determining power supply to a load
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US Patent 7793127 Processor state restoration and method for resume
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US Patent 7809962 Power management block for use in a non-volatile memory system
‌
US Patent 7814346 System and method for continual cable thermal monitoring using cable resistance considerations in power over ethernet
‌
US Patent 7814353 Power management system for a communication device
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US Patent 7814362 System and method for power saving delay locked loop control
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US Patent 7818602 Semiconductor integrated circuit device preventing logic transition during a failed clock period
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US Patent 7822957 Method for carrying out an information processing in accordance with firmware in a plurality of chips
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US Patent 7823004 Clock source selection for modular computer system as a function of modulo difference
‌
US Patent 7827427 System-on-chip embodying sleep mode by using retention input/out device
‌
US Patent 7831850 Hybrid operating systems for battery powered computing systems
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US Patent 7831851 Switching regulator
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US Patent 7831854 Embedded system for compensating setup time violation and method thereof
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US Patent 7831855 System and method for generating a reset signal for synchronization of a signal
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US Patent 7844838 Inter-die power manager and power management method
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US Patent 7849302 Direct boot arrangement using a NAND flash memory
‌
US Patent 7849342 Method and system for implementing generalized system stutter
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US Patent 7849343 Pre-detection of powered devices
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US Patent 7849347 System and method for updating a time-related state of a migrating logical partition
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US Patent 7856551 Dynamically discovering a system topology
‌
US Patent 7856562 Selective deactivation of processor cores in multiple processor core systems
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US Patent 7856565 Electronic device with serial ATA interface and power saving method for serial ATA buses
‌
US Patent 7856568 Electronic apparatus and peak power-controlling method related thereto
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US Patent 7861105 Clock data recovery (CDR) system using interpolator and timing loop module
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US Patent 7865754 Power budget management in power over ethernet systems
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US Patent 7870375 Apparatus, system, and method for updating a code image for a communication adapter
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US Patent 7870379 Updating a power supply microcontroller
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US Patent 7870404 Transitioning to and from a sleep state of a processor
‌
US Patent 7873850 System and method of controlling power consumption and associated heat generated by a computing device
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US Patent 7873854 System for monitoring power supply voltage
‌
US Patent 7873856 Microcontroller unit having power supply voltage monitor
‌
US Patent 7886173 Transitioning computing devices from secondary power to primary power after corresponding, independent delay times
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US Patent 7890783 Method and system for discovering a power source on a peripheral bus
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US Patent 7895425 Operation, administration and maintenance (OAM) in a service insertion architecture (SIA)
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US Patent 7895454 Instruction dependent dynamic voltage compensation
‌
US Patent 7900065 Method and system for monitoring module power status in a communication device
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US Patent 7900067 Battery powered device with dynamic and performance management
‌
US Patent 7900077 Power supplying method and apparatus and a system using the same
‌
US Patent 7900079 Data capture window synchronizing method for generating data bit sequences and adjusting capture window on parallel data paths
‌
US Patent 7900081 Microcomputer and control system having the same
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US Patent 7908496 Systems and methods for communicating voltage regulation information between a voltage regulator and an integrated circuit
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US Patent 7908500 Low power retention flip-flops
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US Patent 7908505 Apparatus, system, and method for event, time, and failure state recording mechanism in a power supply
‌
US Patent 7913098 Image forming apparatus and power control method
‌
US Patent 7913100 Opportunistic initiation of data traffic
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US Patent 7921313 Scheduling processor voltages and frequencies based on performance prediction and power constraints
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US Patent 7925909 Emergency mobile device power source
‌
US Patent 7930569 Firmware controlled dynamic voltage adjustment
‌
US Patent 7941676 Processor array having a multiplicity of processor elements and method of transmitting electricity between processor elements
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US Patent 7941683 Data processing device with low-power cache access mode
‌
US Patent 7945798 Battery pack for portable computer
‌
US Patent 7945800 Synchronization devices having input/output delay model tuning elements in signal paths to provide tuning capabilities to offset signal mismatch
‌
US Patent 7958380 Coarsely controlling memory power states
‌
US Patent 7958381 Energy conservation in multipath data communications
‌
US Patent 7966485 Universal operating system to hardware platform interface for gaming machines
‌
US Patent 7966501 Multi-function peripheral, power supply apparatus, and power supply control method
‌
US Patent 7971047 Operating system environment and installation
‌
US Patent 7971074 Method, system, and apparatus for a core activity detector to facilitate dynamic power management in a distributed system
‌
US Patent 7984284 SPI auto-boot mode
‌
US Patent 7984309 Power supply system and management system
‌
US Patent 7984314 Power management of low power link states
‌
US Patent 7987376 Power supply controller configured to supply power to external device and modules of computer system according to the selected power supply mode
‌
US Patent 7987377 System for preventing unauthorized activation of computer
‌
US Patent 7987381 Cyclemaster synchronization in a distributed bridge
‌
US Patent 7992016 Data transmitter with an electric power distribution unit distributes electric power from radio signal received from external device and transmits information in radio signal
‌
US Patent 7992018 System device including NIC and power-saving controlling method of the same
‌
US Patent 7992019 System device including NIC and power-saving controlling method of the same
‌
US Patent 7996667 System with at least two BIOS memories for starting the system
‌
US Patent 7996692 Information processing apparatus and semiconductor integrated circuit
‌
US Patent 7996694 Dark wake
‌
US Patent 8001397 System software for managing power allocation to Ethernet ports in the absence of mutually exclusive detection and powering cycles in hardware
‌
US Patent 8001412 Combined alignment scrambler function for elastic interface
‌
US Patent 8006082 Dynamically reconfiguring platform settings
‌
US Patent 8006108 Dynamic selection of group and device power limits
‌
US Patent 8010814 Apparatus for controlling power management of digital signal processor and power management system and method using the same
‌
US Patent 8010821 Systems and methods for wake on event in a network
Edits on 8 Dec, 2021
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edited on 8 Dec, 2021
Edits made to:
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Infobox
Patent primary examiner of
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US Patent 8010821 Systems and methods for wake on event in a network

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