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D. H. Malzahn

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Edits on 14 Dec, 2021
"Remove inverse infobox"
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Golden AI
edited on 14 Dec, 2021
Edits made to:
Infobox (-114 properties)
Infobox
Patent primary examiner of
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US Patent 7089277 Computation circuit having dynamic range extension function
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US Patent 7096240 Channel coupling for an AC-3 encoder
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US Patent 7099905 Novelty calculator system for amusement
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US Patent 7099910 Partitioned shifter for single instruction stream multiple data stream (SIMD) operations
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US Patent 7099911 Givens rotations computation
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US Patent 7111032 Residue computing device
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US Patent 7111034 Carry foreknowledge adder
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US Patent 7117232 Method and apparatus for providing packed shift operations in a processor
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US Patent 7117234 Waveform generator for use in IQ modulation
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US Patent 7120655 Digital filter
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US Patent 7120659 Apparatus, methods, and computer program products for determining the coefficients of a function with decreased latency
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US Patent 7120661 Bit exactness support in dual-MAC architecture
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US Patent 7124155 Latching electronic circuit for random number generation
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US Patent 7124156 Apparatus and method for immediate non-sequential state transition in a PN code generator
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US Patent 7124158 Technique for high speed PRBS generation
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US Patent 7130875 Digital filter coefficient setting apparatus and digital filter coefficient setting method
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US Patent 7133886 Interactive adaptive filter and interactive adaptive filtering method thereof
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US Patent 7133888 Method and programmable apparatus for quantum computing
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US Patent 7133889 Flexible galois field multiplier
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US Patent 7136888 Parallel counter and a logic circuit for performing multiplication
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US Patent 7139785 Apparatus and method for reducing sequential bit correlation in a random number generator
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US Patent 7139786 Method and apparatus for efficiently performing a square root operation
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US Patent 7146391 Method and system for implementing SLICE instructions
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US Patent RE39429 Combination laptop and pad computer
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US Patent 7149763 Method for generating a random prime number within a predetermined interval
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US Patent 7149767 Method and system for determining quotient digits for decimal division in a superscaler processor
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US Patent 7152087 Finite impulse response filter
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US Patent 7155471 Method and system for determining the correct rounding of a function
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US Patent 7159003 Method and apparatus for generating sign-digit format of sum of two numbers
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US Patent 7165086 System, method, and apparatus for division coupled with rounding of signed binary numbers
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US Patent 7167888 System and method for accurately calculating a mathematical power function in an electronic device
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US Patent 7167889 Decimal multiplication for superscaler processors
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US Patent 7167891 Narrow data path for very high radix division
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US Patent 7171437 Residue calculating unit immune to power analysis
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US Patent 7174355 Random number generator with selectable dual random bit string engines
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US Patent 7174356 Complex multiplication method and apparatus with phase rotation
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US Patent 7174358 System, method, and apparatus for division coupled with truncation of signed binary numbers
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US Patent 7177891 Compact Galois field multiplier engine
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US Patent 7185039 Multiplier for modular exponentiation
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US Patent 7188133 Floating point number storage method and floating point arithmetic device
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US Patent 7197522 Bi-quad digital filter configured with a bit binary rate multiplier
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US Patent 7197523 Efficient use of detectors for random number generation
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US Patent RE39578 Pipelined carry-lookahead generation for a fast incrementer
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US Patent 7206797 Random number slip and swap generators
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US Patent 7206801 Digital multiplier with reduced spurious switching by means of Latch Adders
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US Patent 7209937 Method and apparatus for generation of arbitrary mono-cycle waveforms
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US Patent 7219111 Numeric value search apparatus and numeric value search method
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US Patent 7219113 Pseudo-random binary sequence checker with automatic synchronization
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US Patent 7222146 Method and apparatus for facilitating exception-free arithmetic in a computer system
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US Patent 7225213 Interpolation filter and method for digitally interpolating a digital signal
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US Patent 7225216 Method and system for a floating point multiply-accumulator
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US Patent 7225217 Low-power Booth-encoded array multiplier
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US Patent 7233969 Method and apparatus for a parallel correlator and applications thereof
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US Patent 7236994 Electronic calculating hand held implement
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US Patent 7236996 Methods for generating random numbers
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US Patent 7240084 Generic implementations of elliptic curve cryptography using partial reduction
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US Patent 7243118 Method and apparatus for efficient derivation of modulo arithmetic for frequency selection
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US Patent 7254598 Finite impulse response filter and digital signal receiving apparatus
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US Patent 7254600 Masking of factorized data in a residue number system
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US Patent 7260591 Method for synthesizing linear finite state machines
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US Patent 7260592 Addressing mode and/or instruction for providing sine and cosine value pairs
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US Patent 7260594 Arithmetic logic unit over finite field GF(2
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US Patent 7263540 Method of generating multiple random numbers
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US Patent 7263542 Inverse filtering method, synthesis filtering method, inverse filter device, synthesis filter device and devices comprising such filter devices
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US Patent 7263543 Method for manipulating data in a group of processing elements to transpose the data using a memory stack
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US Patent 7263544 Performance optimized approach for efficient numerical computations
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US Patent 7266577 Modular multiplication apparatus, modular multiplication method, and modular exponentiation apparatus
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US Patent 7266581 Arithmetic circuit
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US Patent 7269617 Hybrid multipliers implemented using DSP circuitry and programmable logic circuitry
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US Patent 7272622 Method and apparatus for parallel shift right merge of data
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US Patent 7275076 Multiplication logic circuit
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US Patent 7277906 Method for determining an output value having a lowest error value from an input value
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US Patent 7287051 Multi-functional digital signal processing circuitry
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US Patent 7290022 Method and filter arrangement for digital recursive filtering in the time domain
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US Patent 7290024 Methods and apparatus for performing mathematical operations using scaled integers
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US Patent 7290025 Calculation method for division of digital data, calculation apparatus for division of digital data, and program therefor
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US Patent 7290026 Low-power high-speed 4-2 compressor with minimized transistor count
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US Patent 7293054 Random number source and associated methods
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US Patent 7293056 Variable width, at least six-way addition/accumulation instructions
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US Patent 7296045 Matrix-valued methods and apparatus for signal processing
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US Patent 7296047 Method and apparatus for solving overdetermined systems of interval linear equations
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US Patent 7299254 Binary coded decimal addition
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US Patent 7302457 Method and apparatus for providing random bits
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US Patent 7313584 Increased precision in the computation of a reciprocal square root
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US Patent 7313585 Multiplier circuit
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US Patent 7315874 Electronic circuit for random number generation
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US Patent 7315875 Data filtering
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US Patent 7315877 Efficient implementation of a multidimensional fast fourier transform on a distributed-memory parallel multi-node computer
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US Patent 7318077 Method for two-dimensional representation, interpolation and compression of data
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US Patent 7320013 Method and apparatus for aligning operands for a processor
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US Patent 7321911 Method of generating sinusoidal signal
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US Patent 7321912 Device with dB-to-linear gain conversion
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US Patent 7321914 Fast method for calculating powers of two as a floating point data type
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US Patent 7321916 Methods and apparatus for extracting integer remainders
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US Patent 7325021 VLSI implementation of metastability-based random number generator using delay ladders
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US Patent 7325024 Adder circuit with sense-amplifier multiplexer front-end
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US Patent 7330866 System for frequency-domain scaling for discrete cosine transform
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US Patent 7330867 Method and device for floating-point multiplication, and corresponding computer-program product
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US Patent 7334011 Method and system for performing a multiplication operation and a device
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US Patent 7337205 Matrix multiplication in a vector processing system
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US Patent 7340495 Superior misaligned memory load and copy using merge hardware
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US Patent 7340498 Apparatus and method for determining fixed point in mobile communication system
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US Patent 7346641 Method and apparatus for basis conversion in finite field
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US Patent 7346643 Processor with improved accuracy for multiply-add operations
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US Patent 7349937 Fast incrementer using zero detection and increment method thereof
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US Patent 7356553 Data processing apparatus and method for determining a processing path to perform a data processing operation on input data elements
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US Patent 7376689 Method and apparatus for reducing the crest factor of a signal
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US Patent 7386581 Performance FIR filter
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US Patent RE40389 Generating a serial number from random numbers
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US Patent 7392273 High-sticky calculation in pipelined fused multiply/add circuitry
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US Patent 7395298 Method and apparatus for performing multiply-add operations on packed data
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US Patent 7395302 Method and apparatus for performing horizontal addition and subtraction
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US Patent 7412467 System and method for operation mode control in a computer system
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US Patent 7412476 Decimal multiplication for superscaler processors
Edits on 1 Dec, 2021
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7412476 Decimal multiplication for superscaler processors
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Golden AI
edited on 1 Dec, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
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US Patent 7412467 System and method for operation mode control in a computer system
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Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7395302 Method and apparatus for performing horizontal addition and subtraction
Golden AI profile picture
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7395298 Method and apparatus for performing multiply-add operations on packed data
Golden AI profile picture
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7392273 High-sticky calculation in pipelined fused multiply/add circuitry
Golden AI profile picture
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent RE40389 Generating a serial number from random numbers
Golden AI profile picture
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7386581 Performance FIR filter
Edits on 29 Nov, 2021
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Golden AI
edited on 29 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7376689 Method and apparatus for reducing the crest factor of a signal
Edits on 25 Nov, 2021
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Golden AI
edited on 25 Nov, 2021
Edits on 24 Nov, 2021
Golden AI profile picture
Golden AI
edited on 24 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7349937 Fast incrementer using zero detection and increment method thereof
Golden AI profile picture
Golden AI
edited on 24 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7346643 Processor with improved accuracy for multiply-add operations
Golden AI profile picture
Golden AI
edited on 24 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7346641 Method and apparatus for basis conversion in finite field
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7340498 Apparatus and method for determining fixed point in mobile communication system
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7340495 Superior misaligned memory load and copy using merge hardware
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7337205 Matrix multiplication in a vector processing system
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7334011 Method and system for performing a multiplication operation and a device
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7330866 System for frequency-domain scaling for discrete cosine transform
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7325024 Adder circuit with sense-amplifier multiplexer front-end

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