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James K. Trujillo
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Edits on 14 Dec, 2021
"Remove inverse infobox"
Golden AI
edited on 14 Dec, 2021
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Patent primary examiner of
US Patent 7093150 Wavefront clock synchronization
US Patent 7093824 Portable fencing system and components therefor
US Patent 7100040 Apparatus and method to decrease boot time and hibernate awaken time of a computer system
US Patent 7107443 Method for customizing a computer system by using stored configuration parameters in a configurism mechanism
US Patent 7107444 Apparatus and method to decrease boot time and hibernate awaken time of a computer system
US Patent 7111184 System and method for deterministic communication across clock domains
US Patent 7117382 Variably controlled delay line for read data capture timing window
US Patent 7127601 System and method for delivering FPGA programming
US Patent 7131022 Timing generator system for outputting clock signals to components of an imaging system according to decoded timing control instructions
US Patent 7134032 Method and apparatus for changing power modes based on monitored I/O packets
US Patent 7137020 Method and apparatus for disabling defective components in a computer system
US Patent 7139907 Method and apparatus for implementing distributed SCSI devices using enhanced adapter reservations
US Patent 7139908 Information processing apparatus and memory update method in the apparatus
US Patent 7139941 Method for correcting data using temporally preceding data
US Patent 7143281 Method and apparatus for automatically changing kernel tuning parameters
US Patent 7143299 Method for power management of intelligent hardware
US Patent 7143302 Pipeline structure
US Patent 7146520 Method and apparatus for controlling clocks in a processor with mirrored units
US Patent 7149887 System and method for computer hardware identification
US Patent 7149889 Proactive reboot
US Patent 7149904 System and method for providing a power control device for a computing unit
US Patent 7155621 Method and apparatus to enhance processor power management
US Patent 7155622 System and method for the management of power supplied over data lines
US Patent 7155631 Information processing unit with a clock control circuit having access to the system bus during system clock changes
US Patent 7159132 USB device that provides power that is different from power prescribed in the USB standard
US Patent 7159134 Method and apparatus for clock and power control in wireless systems
US Patent 7162622 Microcomputer for apparatus control and vehicle-mounted electronic control unit incorporating microcomputer
US Patent 7162651 Electric device and method for operating an electric device
US Patent 7162653 Electric power distribution center having a plurality of ASICS each with a voltage to frequency converter that use an RMS current value
US Patent 7165183 Temperature controlled semiconductor circuit
US Patent 7167989 Processor and methods to reduce power consumption of processor components
US Patent 7171550 Data structure and method for managing modules associated with a kernel
US Patent 7171575 Delay locked loop for and FPGA architecture
US Patent 7174467 Message based power management in a multi-processor system
US Patent 7181639 Method and apparatus for controlling the flow of data between two circuits by generating one or more phase shifted clock signals
US Patent 7185217 Method and apparatus for providing a clock signal to a plurality of destination receivers in an integrated circuit environment
US Patent 7185218 Synchronous controlling unit and synchronous control method
US Patent 7188260 Apparatus and method for centralized power management
US Patent 7188266 Systems and methods for reducing static and total power consumption in a programmable logic device
US Patent 7191327 Internet-enabled device provisioning, upgrade and recovery mechanism
US Patent 7191349 Mechanism for processor power state aware distribution of lowest priority interrupt
US Patent 7191350 Instruction conversion apparatus and instruction conversion method providing power control information, program and circuit for implementing the instruction conversion, and microprocessor for executing the converted instruction
US Patent 7194650 System and method for synchronizing multiple synchronizer controllers
US Patent 7200763 Method and apparatus for controlling the power consumption of a semiconductor device
US Patent 7203829 Apparatus and method for initializing coprocessor for use in system comprised of main processor and coprocessor
US Patent 7203830 Apparatus and method to decrease boot time and hibernate awaken time of a computer system
US Patent 7203848 Electrical apparatus, program for controlling electrical apparatus, and method for controlling electrical apparatus
US Patent 7206954 Reduced power consumption for embedded processor
US Patent 7206956 Duty cycle distortion compensation for the data output of a memory device
US Patent 7210056 Low latency comma detection and clock alignment
US Patent 7212470 Method and apparatus to transfer information between a host computer and one or more hard disks disposed in a data storage and retrieval system
US Patent 7213142 System and method to initialize registers with an EEPROM stored boot sequence
US Patent 7213163 Restoring power in a hot swappable multi-server data processing environment
US Patent 7216249 Clock generation system
US Patent 7219251 Programmable clock synchronizer
US Patent 7225287 Scalable DMA remapping on a computer bus
US Patent 7225328 Maintenance terminal of disk array device
US Patent 7228411 Method and apparatus to use-volatile read/write memory for bootstrap code and processes by relocating write instructions
US Patent 7228441 Multi-server and multi-CPU power management system and method
US Patent 7234054 Method and apparatus for enabling platform configuration
US Patent 7237133 Power supply control circuit for memories, method thereof and apparatus equipped with memories
US Patent 7240229 System and method for routing data and power to external devices
US Patent 7243251 Method and apparatus for notifying end user of excess power demand
US Patent 7243255 Design of instantaneously restartable clocks and their use such as in connecting clocked subsystems using clockless sequencing networks
US Patent 7246222 Processor type determination based on reset vector characteristics
US Patent 7246226 Method and apparatus rendering user accounts portable
US Patent 7249271 Data transfer control device and electronic instrument
US Patent 7251736 Remote power control in a multi-node, partitioned data processing system via network interface cards
US Patent 7254660 Data transfer method and data transfer device
US Patent 7254731 Image forming apparatus having an improved power-mode switching function
US Patent 7254732 Method and apparatus of automatic power management control for serial ATA device directly attached to SAS/SATA host controller
US Patent 7260732 Power regulation system and method for a portable electronic device
US Patent 7263624 Methods and apparatus for power control in a scalable array of processor elements
US Patent 7266680 Method and apparatus for loading configuration data
US Patent 7272743 Semiconductor integrated circuit
US Patent 7278042 Circuit for protecting a motherboard by removing power to the motherboard based on the status of an attached component
US Patent 7284142 Real time interrupt module for operating systems and time triggered applications
US Patent 7287175 Optical network terminal with low-power sleep logic that substantially extends the life of the battery after the AC main power supply has been lost
US Patent 7290155 Method, system, and apparatus for dynamically configuring the operating point utilized for thermal management of an integrated circuit
US Patent 7296170 Clock controller with clock source fail-safe logic
US Patent 7299373 Systems and methods for a controllable release of power supply in a mobile device
US Patent 7302560 Use of NAND flash for hidden memory blocks to store an operating system program
US Patent 7305568 Backup system for multi-source audio apparatus
US Patent 7305573 Determining whether characteristics of a local area network node allow it to receive power over communication cabling
US Patent 7305574 System, method and storage medium for bus calibration in a memory subsystem
US Patent 7308568 Network interface with double date rate and delay locked loop
US Patent 7308570 System and method for booting embedded systems using removable storage
US Patent 7308586 Interlocked plug and play with power management for operating systems
US Patent 7308587 Method and apparatus for preventing the transitioning of computer system power modes while the system is in motion
US Patent 7308593 Interlocked synchronous pipeline clock gating
US Patent 7313680 Apparatus and method for detecting the presence of a floppy drive by reading a general purpose input prior to reading a floppy drive controller
US Patent 7318164 Conserving energy in a data processing system by selectively powering down processors
US Patent 7325150 Combiner for power delivery over data communication cabling infrastructure
US Patent 7325151 Program, recording medium, method, and information processing apparatus for controlling an execution mode of a CPU
US Patent 7330989 Method and apparatus of automatic power management control for Serial ATA interface utilizing a combination of IOP control and specialized hardware control
US Patent 7330992 System and method for read synchronization of memory modules
US Patent 7334151 Method of and device for detecting cable connection using an oscillation circuit and a counter
US Patent 7337313 Information device, storage medium and initial state restoration method
US Patent 7340594 Bios-level incident response system and method
US Patent 7340616 Power management of storage units in a storage array
US Patent 7343484 Personal computer integrated with personal digital assistant
US Patent 7350095 Digital circuit to measure and/or correct duty cycles
US Patent 7353375 Method and apparatus for managing processor availability using a microcode patch
US Patent 7353411 Power efficiency in microprocessors using reduction of hamming distance between data value
US Patent 7353415 System and method for power usage level management of blades installed within blade servers
US Patent 7353418 Method and apparatus for updating serial devices
US Patent 7360101 Apparatus and method for controlling CPU speed transition
US Patent 7363516 Rack equipment management system and method
US Patent 7363519 Method and apparatus for power management by user needs
US Patent 7366920 System and method for selective memory module power management
US Patent 7366932 Method and apparatus to adapt the clock rate of a programmable coprocessor for optimal performance and power dissipation
US Patent 7366941 Wavefront clock synchronization
US Patent 7366942 Method and apparatus for high-speed input sampling
US Patent 7370219 Power sharing between portable computer system and peripheral device
US Patent 7373530 Systems and methods for providing power-loss protection to sleeping computers systems
US Patent 7373541 Alignment signal control apparatus and method for operating the same
US Patent 7376824 Method and apparatus for rendering user accounts portable
US Patent 7376857 Method of timing calibration using slower data rate pattern
US Patent 7380152 Daisy chained multi-device system and operating method
US Patent 7383450 Low power firmware
US Patent 7386713 On-chip security method and apparatus
US Patent 7386750 Reduced bus turnaround time in a multiprocessor architecture
US Patent 7389289 Filtering search results by grade level readability
US Patent 7392259 Method and system for supporting XQuery trigger in XML-DBMS based on relational DBMS
US Patent 7392418 Capacity on demand using signaling bus control
US Patent 7428644 System and method for selective memory module power management
US Patent 7440956 Enforcing constraints from a parent table to a child table
US Patent 7440972 Interactive media authoring without access to original source material
US Patent 7464078 Method for automatically extracting by-line information
US Patent 7475068 Globally optimal and greedy heuristics based approach to access structure selection
US Patent 7483893 System and method for lightweight loading for managing content
US Patent 7483903 Unsupervised learning tool for feature correction
US Patent 7490081 Method and system for automatic identification and notification of relevant software defects
US Patent 7516155 method to validate consistency of component business model maps
US Patent 7536572 Power sharing between portable computer system and peripheral devices
US Patent 7644071 Selective display of target areas in a document
US Patent 7668804 Recommending statistical views using cost/benefit metrics
Edits on 4 Dec, 2021
Golden AI
edited on 4 Dec, 2021
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Patent primary examiner of
US Patent 7668804 Recommending statistical views using cost/benefit metrics
Edits on 3 Dec, 2021
Golden AI
edited on 3 Dec, 2021
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Patent primary examiner of
US Patent 7644071 Selective display of target areas in a document
Edits on 2 Dec, 2021
Golden AI
edited on 2 Dec, 2021
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Patent primary examiner of
US Patent 7536572 Power sharing between portable computer system and peripheral devices
Golden AI
edited on 2 Dec, 2021
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Patent primary examiner of
US Patent 7516155 method to validate consistency of component business model maps
Golden AI
edited on 1 Dec, 2021
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Patent primary examiner of
US Patent 7490081 Method and system for automatic identification and notification of relevant software defects
Edits on 1 Dec, 2021
Golden AI
edited on 1 Dec, 2021
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Infobox
Patent primary examiner of
US Patent 7483903 Unsupervised learning tool for feature correction
Golden AI
edited on 1 Dec, 2021
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Patent primary examiner of
US Patent 7483893 System and method for lightweight loading for managing content
Golden AI
edited on 1 Dec, 2021
Edits made to:
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Patent primary examiner of
US Patent 7475068 Globally optimal and greedy heuristics based approach to access structure selection
Golden AI
edited on 1 Dec, 2021
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+1
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Infobox
Patent primary examiner of
US Patent 7464078 Method for automatically extracting by-line information
Golden AI
edited on 1 Dec, 2021
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properties)
Infobox
Patent primary examiner of
US Patent 7440972 Interactive media authoring without access to original source material
Golden AI
edited on 1 Dec, 2021
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Patent primary examiner of
US Patent 7440956 Enforcing constraints from a parent table to a child table
Golden AI
edited on 1 Dec, 2021
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Patent primary examiner of
US Patent 7428644 System and method for selective memory module power management
Edits on 30 Nov, 2021
Golden AI
edited on 30 Nov, 2021
Edits made to:
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Patent primary examiner of
US Patent 7392418 Capacity on demand using signaling bus control
Golden AI
edited on 30 Nov, 2021
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Patent primary examiner of
US Patent 7392259 Method and system for supporting XQuery trigger in XML-DBMS based on relational DBMS
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7389289 Filtering search results by grade level readability
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox
(
+1
properties)
Infobox
Patent primary examiner of
US Patent 7386750 Reduced bus turnaround time in a multiprocessor architecture
Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7386713 On-chip security method and apparatus
Golden AI
edited on 30 Nov, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7383450 Low power firmware
Golden AI
edited on 30 Nov, 2021
Edits made to:
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+1
properties)
Infobox
Patent primary examiner of
US Patent 7380152 Daisy chained multi-device system and operating method
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