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Jermele Hollington

based in Maryland

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Edits on 26 Sep, 2022
"Infobox creation from: https://twitter.com/jermele06"
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Golden AI
edited on 26 Sep, 2022
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Location
Laurel, Maryland
Laurel, Maryland
"Edit from table cell"
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Roman Beliaev
edited on 26 Sep, 2022
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Twitter URL
https://twitter.com/jermele06
Edits on 15 Dec, 2021
"Remove inverse infobox"
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Golden AI
edited on 15 Dec, 2021
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Patent primary examiner of
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US Patent 7088091 Testing a multi-channel device
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US Patent 7088123 System and method for extraction of C-V characteristics of ultra-thin oxides
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US Patent 7091714 Gain and phase detector having dual logarithmic amplifiers
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US Patent 7091716 Multilayer wiring board, manufacturing method therefor and test apparatus thereof
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US Patent 7091729 Cantilever probe with dual plane fixture and probe apparatus therewith
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US Patent 7091732 Systems and methods for probing processor signals
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US Patent 7091738 Inspection system for active matrix panel, inspection method for active matrix panel and manufacturing method for active matrix OLED panel
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US Patent 7095241 Anisotropic conductive connector, probe member, wafer inspecting device, and wafer inspecting method
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US Patent 7098650 Apparatus for planarizing a probe card and method using same
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US Patent 7098679 Circuit tester interface
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US Patent 7102367 Probe card and testing method of semiconductor chip, capacitor and manufacturing method thereof
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US Patent 7102369 Contact pin, connection device and method of testing
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US Patent 7102373 Inspection unit
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US Patent 7106081 Parallel calibration system for a test device
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US Patent 7106085 Electronic circuit unit having small size and good productivity
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US Patent 7106090 Optical semiconductor device with multiple quantum well structure
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US Patent 7109699 Long range alternating current phasing voltmeter
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US Patent 7109730 Non-contact tester for electronic circuits
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US Patent 7109736 System for measuring signal path resistance for an integrated circuit tester interconnect structure
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US Patent 7109741 Image data display on an information carrier
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US Patent 7112949 Enhanced fault protection in electricity meter
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US Patent 7112974 Proble for testing integrated circuits
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US Patent 7112975 Advanced probe card and method of fabricating same
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US Patent 7112977 Construction and use of dielectric plate for mating test equipment to a load board of a circuit tester
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US Patent 7112978 Frequency specific closed loop feedback control of integrated circuits
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US Patent 7112981 Method of debugging a 3D packaged IC
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US Patent 7116118 Method and apparatus for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability
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US Patent 7116119 Probe card with coplanar daughter card
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US Patent 7116122 Method for ball grid array chip packages having improved testing and stacking characteristics
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US Patent 7119570 Method of measuring performance of a semiconductor device and circuit for the same
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US Patent 7119571 Test structure design for reliability test
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US Patent 7123035 Optics landing system and method therefor
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US Patent 7123040 System and method for check-in control in wafer testing
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US Patent 7123042 Methods, apparatus and systems for wafer-level burn-in stressing of semiconductor devices
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US Patent 7123044 Testing method, semiconductor device, and display apparatus
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US Patent 7126356 Radiation detector for electrostatic discharge
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US Patent 7126358 Construction structures and manufacturing processes for integrated circuit wafer probe card assemblies
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US Patent 7126359 Device monitor for RF and DC measurement
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US Patent 7126362 Inspection unit
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US Patent 7126365 System and method for measuring negative bias thermal instability with a ring oscillator
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US Patent 7129688 Method for on-line calibration of low accuracy voltage sensor through communication bus
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US Patent 7129694 Large substrate test system
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US Patent 7129696 Method for capacitance measurement in silicon
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US Patent 7129720 Method and device for testing the operativeness of printed circuit boards
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US Patent 7129721 Method and apparatus for processing semiconductor devices in a singulated form
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US Patent 7129722 Methods of improving reliability of an electro-optical module
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US Patent 7129725 Semiconductor test interconnect with variable flexure contacts having polymer material
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US Patent 7129727 Defect inspecting apparatus
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US Patent 7129729 Socket connection test modules and methods of using the same
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US Patent 7129733 Dynamic overdrive compensation test system and method
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US Patent 7129734 Method for testing analog and mixed-signal circuits using functionally related excitations and functionally related measurements
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US Patent 7132822 Multi-processor restart stabilization system and method
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US Patent 7132823 Design for test for a high speed serial interface
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US Patent 7132840 Method of electrical testing
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US Patent 7132841 Carrier for test, burn-in, and first level packaging
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US Patent 7132844 Testing device and testing method for testing an electronic device
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US Patent 7135852 Integrated process condition sensing wafer and data analysis system
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US Patent 7135879 Test structure and method for failure analysis of small contacts in integrated circuit technology development
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US Patent 7135883 Inspection method and inspection apparatus for inspecting electrical characteristics of inspection object
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US Patent 7138814 Integrated circuit with controllable test access to internal analog signal pads of an area array
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US Patent 7138815 Power distribution system built-in self test using on-chip data converter
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US Patent 7138816 On-die monitoring device power grid
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US Patent 7138818 Massively parallel interface for electronic circuit
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US Patent 7141963 Handheld switch measurement system
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US Patent 7141992 Method for measuring impurity metal concentration
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US Patent 7141993 Interface apparatus for integrated circuit testing
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US Patent 7141998 Method and apparatus for burn-in optimization
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US Patent 7142001 Packaged circuit module for improved installation and operation
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US Patent 7142002 Test handler emulation
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US Patent 7145351 Electrical inspection apparatus
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US Patent 7145354 Resilient probes for electrical testing
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US Patent 7148675 Ring type current sensor
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US Patent 7148677 Vacuum circuit interrupter including circuit monitoring leakage or loss of vacuum and method of monitoring a vacuum interrupter for leakage or loss of vacuum
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US Patent 7148712 Probe for use in determining an attribute of a coating on a substrate
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US Patent 7148713 Algoristic spring as probe
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US Patent 7148717 Methods and apparatus for testing electronic circuits
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US Patent 7151366 Integrated process condition sensing wafer and data analysis system
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US Patent 7151385 Contact probe, method of manufacturing the contact probe, and device and method for inspection
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US Patent 7151387 Analysis module, integrated circuit, system and method for testing an integrated circuit
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US Patent 7151388 Method for testing semiconductor devices and an apparatus therefor
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US Patent 7154258 IC transfer device
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US Patent 7154285 Method and apparatus for providing PCB layout for probe card
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US Patent 7154291 Measuring bi-directional current through a field-effect transistor by virtue of drain-to-source voltage measurement
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US Patent 7157924 Method and apparatus for on-die voltage fluctuation detection
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US Patent 7157929 System for testing flat panel display devices
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US Patent 7161366 Method and apparatus for probe tip contact
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US Patent 7161370 Semiconductor testing device
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US Patent 7161371 Module part
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US Patent 7161374 Test pattern of semiconductor device and test method using the same
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US Patent 7161375 Phase-loss detection for rotating field machine
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US Patent 7164281 Circuit board component ambient moisture exposure monitoring
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US Patent 7164282 Methods and apparatus for determining an average electrical response to a conductive layer on a substrate
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US Patent 7164285 Directional power detection by quadrature sampling
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US Patent 7168163 Full wafer silicon probe card for burn-in and testing and test system including same
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US Patent 7170310 System and method using locally heated island for integrated circuit testing
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US Patent 7173433 Circuit property measurement method
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US Patent 7173439 Guide for tip to transmission path contact
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US Patent 7173447 Method and apparatus for diagnosing fault in semiconductor device
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US Patent 7176673 Direct current detection circuit
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US Patent 7180316 Probe head with machined mounting pads and method of forming same
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US Patent 7180321 Tester interface module
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US Patent 7180322 Closed loop feedback control of integrated circuits
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US Patent 7183758 Automatic exchange of degraders in accelerated testing of computer chips
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US Patent 7183782 Stage for placing target object
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US Patent 7183789 Comparing on die response and expected response applied to outputs
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US Patent 7183791 Reliability circuit for applying an AC stress signal or DC measurement to a transistor device
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US Patent 7187162 Tools and methods for disuniting semiconductor wafers
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US Patent 7187188 Chuck with integrated wafer support
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US Patent 7187189 Burn-in testing apparatus and method
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US Patent 7187191 Sensor device for determining the layer thickness of a thin layer
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US Patent 7190181 Probe station having multiple enclosures
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US Patent 7190183 Selecting die placement on a semiconductor wafer to reduce test time
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US Patent 7199597 Dual feedback control system for maintaining the temperature of an IC-chip near a set-point
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US Patent 7202683 Cleaning system, device and method
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US Patent 7202688 Output buffer circuit having signal path used for testing and integrated circuit and test method including the same
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US Patent 7202689 Sensor differentiated fault isolation
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US Patent 7202695 Apparatus and method for inspecting a liquid crystal display panel
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US Patent 7208967 Socket connection test modules and methods of using the same
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US Patent 7208971 Manual probe carriage system and method of using the same
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US Patent 7212022 System and method for measuring time dependent dielectric breakdown with a ring oscillator
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US Patent 7215109 Electric power usage and demand reporting system
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US Patent 7215132 Integrated circuit and circuit board
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US Patent 7221145 Simplified power monitoring system for electrical panels
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US Patent 7221171 Enhanced subsurface membrane interface probe (MIP)
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US Patent 7224174 Optical alignment loops for the wafer-level testing of optical and optoelectronic chips
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US Patent 7224176 Semiconductor device having test element groups
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US Patent 7227347 Device and method for measuring a current
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US Patent 7227371 High performance probe system
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US Patent 7230440 Curved spring structure with elongated section located under cantilevered section
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US Patent 7230441 Wafer staging platform for a wafer inspection system
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US Patent 7235963 Electronic control type throttle valve apparatus, non-contact type rotation angle detecting apparatus used in electronic control type throttle valve apparatus etc. and signal processing apparatus for hall element
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US Patent 7235989 Electrical test device having isolation slot
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US Patent 7235994 Defect monitor for semiconductor manufacturing capable of performing analog resistance measurements
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US Patent 7235998 System and method for measuring time dependent dielectric breakdown with a ring oscillator
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US Patent 7239127 Apparatus and method for inspecting electronic circuits
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US Patent 7239159 Method and apparatus for verifying planarity in a probing system
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US Patent 7239160 Method of electrical testing of an integrated circuit with an electrical probe
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US Patent 7239166 Portable multi-purpose toolkit for testing computing device hardware and software
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US Patent 7242205 System and method for reducing heat dissipation during burn-in
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US Patent 7242209 System and method for testing integrated circuits
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US Patent 7245139 Tester channel to multiple IC terminals
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US Patent 7245142 Liquid crystal substrate inspection apparatus
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US Patent 7250781 Circuit board inspection device
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US Patent 7250782 Method for testing non-componented circuit boards
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US Patent 7256595 Test sockets, test systems, and methods for testing microfeature devices
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US Patent 7262610 Method for manufacturing and testing semiconductor devices on a resin-coated wafer
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US Patent 7262622 Wafer-level package for integrated circuits
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US Patent 7262623 Method for gross I/O functional test at wafer sort
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US Patent 7265530 Adaptive slope compensation for switching regulators
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US Patent 7265561 Device burn in utilizing voltage control
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US Patent 7265567 First die indicator for integrated circuit wafer
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US Patent 7271607 Electrical, high temperature test probe with conductive driven guard
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US Patent 7271609 Method of automatically creating a semiconductor processing prober device file
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US Patent 7276895 Adjustable test head docking apparatus
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US Patent 7279913 Testing assembly for electrical test of electronic package and testing socket thereof
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US Patent 7279920 Expeditious and low cost testing of RFID ICs
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US Patent 7285948 Method and apparatus providing single cable bi-directional triggering between instruments
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US Patent 7292056 Membrane with bumps, method of manufacturing the same, and method of testing electrical circuit
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US Patent 7292059 Power supply assembly for a semiconductor circuit tester
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US Patent 7295028 Semiconductor integrated circuit and memory test method
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US Patent 7295029 Chip-scale package for integrated circuits
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US Patent 7298132 Current sensor
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US Patent 7298156 Electronic part test apparatus
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US Patent 7298158 Network analyzing apparatus and test method
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US Patent 7298160 Method of measuring gate capacitance by correcting dissipation factor error
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US Patent 7298165 Active device array substrate, liquid crystal display panel and examining methods thereof
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US Patent 7307412 Inductive measurement system and method
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US Patent 7307432 Electron beam generating apparatus and optical sampling apparatus using the same
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US Patent 7307435 Probe card
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US Patent 7309979 Utility services usage and demand reporting system
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US Patent 7309998 Process monitor for monitoring an integrated circuit chip
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US Patent 7312620 Burn-in testing apparatus and method
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US Patent 7315181 Method for automatically identifying component failure in a communication network
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US Patent 7317312 Guide for tip to transmission path contact
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US Patent 7317322 Interconnect for bumped semiconductor components
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US Patent 7317324 Semiconductor integrated circuit testing device and method
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US Patent 7319341 Method of maintaining signal integrity across a capacitive coupled solder bump
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US Patent 7323889 Voltage testing and measurement
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US Patent 7327151 Memory application tester having vertically-mounted motherboard
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US Patent 7327152 Integrated test circuit arrangement and test method
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US Patent 7330022 Power monitoring system
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US Patent 7330043 Semiconductor device and test method for the same
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US Patent 7332906 Vacuum circuit interrupter including circuit monitoring leakage or loss of vacuum and method of monitoring a vacuum interrupter for leakage or loss of vacuum
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US Patent 7332918 Prober and probe testing method for temperature-controlling object to be tested
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US Patent 7332919 Method and apparatus for distributing signals over jig-plates
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US Patent 7336090 Frequency specific closed loop feedback control of integrated circuits
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US Patent 7336092 Closed loop feedback control of integrated circuits
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US Patent 7345466 Method and apparatus for cleaning a probe card
‌
US Patent 7345493 Wafer-level burn-in and test
‌
US Patent 7348768 Tray transfer unit and automatic test handler having the same
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US Patent 7355422 Optically enhanced probe alignment
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US Patent 7355426 Universal measuring adapter system
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US Patent 7362115 Chuck with integrated wafer support
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US Patent 7362121 Self-heating mechanism for duplicating microbump failure conditions in FPGAs and for logging failures
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US Patent 7368927 Probe head having a membrane suspended probe
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US Patent 7372251 Semiconductor integrated circuit and memory test method
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US Patent 7372289 Semiconductor integrated circuit device and power supply voltage monitor system employing it
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US Patent 7375543 Electrostatic discharge testing
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US Patent 7378834 Electronic assembly tester and method for optoelectronic device
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US Patent 7382150 Sensitivity switchable detection circuit and method
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US Patent 7570074 Electronic overload relay for mains-fed induction motors
Edits on 2 Dec, 2021
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Golden AI
edited on 2 Dec, 2021
Edits made to:
Infobox (+1 properties)
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Patent primary examiner of
‌
US Patent 7570074 Electronic overload relay for mains-fed induction motors
Edits on 30 Nov, 2021
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Golden AI
edited on 30 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7382150 Sensitivity switchable detection circuit and method
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Golden AI
edited on 29 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7378834 Electronic assembly tester and method for optoelectronic device
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Golden AI
edited on 29 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7375543 Electrostatic discharge testing
Edits on 26 Nov, 2021
Golden AI profile picture
Golden AI
edited on 26 Nov, 2021
Golden AI profile picture
Golden AI
edited on 26 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7372251 Semiconductor integrated circuit and memory test method
Golden AI profile picture
Golden AI
edited on 26 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7368927 Probe head having a membrane suspended probe
Edits on 25 Nov, 2021
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Golden AI
edited on 25 Nov, 2021
Golden AI profile picture
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7362115 Chuck with integrated wafer support
Golden AI profile picture
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7355426 Universal measuring adapter system
Golden AI profile picture
Golden AI
edited on 25 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7355422 Optically enhanced probe alignment
Edits on 24 Nov, 2021
Golden AI profile picture
Golden AI
edited on 24 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7348768 Tray transfer unit and automatic test handler having the same
Golden AI profile picture
Golden AI
edited on 24 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7345493 Wafer-level burn-in and test
Golden AI profile picture
Golden AI
edited on 24 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7345466 Method and apparatus for cleaning a probe card
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Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7336092 Closed loop feedback control of integrated circuits
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7336090 Frequency specific closed loop feedback control of integrated circuits
Edits on 23 Nov, 2021
Golden AI profile picture
Golden AI
edited on 23 Nov, 2021
Edits made to:
Infobox (+1 properties)
Infobox
Patent primary examiner of
‌
US Patent 7332919 Method and apparatus for distributing signals over jig-plates

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