SuVolta

US Patent 7679427 Semiconductor device including a bias voltage generator

US Patent 7687335 Self aligned gate JFET structure and method

US Patent 7687834 Integrated circuit using complementary junction field effect transistor and MOS transistor in silicon and silicon alloys

US Patent 7688111 Level-shifting circuit with bipolar junction transistor

US Patent 7689964 System and method for routing connections

US Patent 7692220 Semiconductor device storage cell structure, method of operation, and method of manufacture

US Patent 7709311 JFET device with improved off-state leakage current and method of fabrication

US Patent 7710148 Programmable switch circuit and method, method of manufacture, and devices and systems including the same

US Patent 7713804 Method of forming an oxide isolated metal silicon-gate JFET

US Patent 7727821 Image sensing cell, device, method of operation, and method of manufacture

US Patent 7729149 Content addressable memory cell including a junction field effect transistor

US Patent 7736962 Advanced JFET with reliable channel control and method of manufacture

US Patent 7741882 Current-limited output buffer

US Patent 7742325 Swapped-body RAM architecture

US Patent 7746146 Junction field effect transistor input buffer level shifting circuit

US Patent 7750735 Voltage-level translator

US Patent 7764137 Circuit and method for generating electrical solutions with junction field effect transistors

US Patent 7772619 Semiconductor device having a fin structure and fabrication method thereof

US Patent 7772620 Junction field effect transistor using a silicon on insulator architecture

US Patent 7804332 Circuit configurations having four terminal JFET devices

US Patent 7843018 Transistor providing different threshold voltages and method of fabrication thereof

US Patent 7843721 Memory cell including an emitter follower and emitter follower sensing scheme and method of reading data therefrom

US Patent 7847354 Semiconductor device with multiple transistors formed in a partially depleted semiconductor-on-insulator substrate

US Patent 7848130 Method and apparatus for improving SRAM write operations

US Patent 7915107 Integrated circuit using complementary junction field effect transistor and MOS transistor in silicon and silicon alloys

US Patent 7941098 Common data line signaling and method

US Patent 7943971 Junction field effect transistor (JFET) structure having top-to-bottom gate tie and method of manufacture

US Patent 7968393 Semiconductor device, design method and structure

US Patent 7969759 Method and apparatus for improving SRAM write operations

US Patent 7973344 Double gate JFET with reduced area consumption and fabrication method therefor

US Patent 7986167 Circuit configurations having four terminal devices