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US Patent 10009992 PCB hybrid redistribution layer

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
December 2, 2016
Date of Patent
June 26, 2018
Patent Application Number
15367679
Patent Citations Received
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US Patent 11380609 Microelectronic assemblies having conductive structures with different thicknesses on a core substrate
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US Patent 10510649 Interconnect substrate
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US Patent 11064615 Wafer level bump stack for chip scale package
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US Patent 11315827 Skip via connection between metallization levels
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10009992
Patent Primary Examiner
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Timothy Thompson

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