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US Patent 10050045 SRAM cell with balanced write port

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
June 16, 2017
Date of Patent
August 14, 2018
Patent Application Number
15625490
Patent Citations Received
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US Patent 12082388 Eight-transistor static random access memory, layout thereof, and method for manufacturing the same
0
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US Patent 11374088 Leakage reduction in gate-all-around devices
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US Patent 11482518 Semiconductor structures having wells with protruding sections for pickup cells
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US Patent 10483267 Eight-transistor static random-access memory, layout thereof, and method for manufacturing the same
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US Patent 10840251 Memory device and manufacturing method
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US Patent 10847214 Low voltage bit-cell
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US Patent 10847216 SRAM memory having a reduced leakage current
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US Patent 10868003 Creating devices with multiple threshold voltages by cut-metal-gate process
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US Patent 10872896 Eight-transistor static random access memory, layout thereof, and method for manufacturing the same
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US Patent 11043595 Cut metal gate in memory macro edge and middle strap
•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10050045
Patent Primary Examiner
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Bryan Junge

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