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US Patent 10181421 Liner recess for fully aligned via

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
July 12, 2017
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Date of Patent
January 15, 2019
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Patent Application Number
15647977
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Patent Citations Received
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US Patent 11610841 Interconnect structure for semiconductor device and methods of fabrication thereof
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US Patent 12087624 Beol tip-to-tip shorting and time dependent dielectric breakdown
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US Patent 10777504 Interconnect structure for semiconductor device and methods of fabrication thereof
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US Patent 11069613 Integrated circuit device and method of manufacturing the same
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Patent Inventor Names
Sean Xuan Lin
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Errol Todd Ryan
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
10181421
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Patent Primary Examiner
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Scott B. Geyer
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