US Patent 10319698 Microelectronic device package having alternately stacked die

A microelectronic device package including multiple layers of stacked die. Multiple die layers in the package can include two or more die. At least two die in a first layer will be laterally spaced from one another to define a first gap extending in a first direction; and at least two die in a second layer will be laterally spaced from one another to define a second gap extending in a second direction that is angularly offset from the first direction. The first and second directions can be perpendicular to one another.