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US Patent 10368442 Integrated circuit structure and method of forming

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Patent Citations Received
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US Patent 12080684 Die stacks and methods forming same
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Patent abstract

An integrated circuit structure and method of forming is provided. A die is place on a substrate and encased in molding compound. A redistribution layer is formed overlying the die and the substrate is removed. One or more surface mounted devices and/or packages are connected to the redistribution layer on an opposite side of the redistribution layer from the die. The redistribution layer is connected to a printed circuit board.

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Patent Inventor Names
Chen-Hua Yu0
Jui-Pin Hung0
Kuo-Chung Yee0
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Official Website
https://pdfpiw.uspto.gov/.piw?Docid=103684420
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Infobox
Is a
Patent
Patent
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
103684420
Date of Patent
July 30, 2019
0
Patent Application Number
149287680
Date Filed
October 30, 2015
0
Official Website
https://pdfpiw.uspto.gov/.piw?Docid=103684420
Patent Citations Received
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US Patent 10818640 Die stacks and methods forming same
0
‌
US Patent 11380655 Die stacks and methods forming same
0
Patent Primary Examiner
‌
Peter Dungba Vo
0
Edits on 6 Jul, 2022
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Patent citations received
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US Patent 11380655 Die stacks and methods forming same
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Website URL
https://pdfpiw.uspto.gov/.piw?Docid=10368442
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Patent citations received
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US Patent 10818640 Die stacks and methods forming same
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 US Patent 10368442 Integrated circuit structure and method of forming

Infobox
Is a
Patent
Patent
Patent jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent number
10368442
Date of patent
July 30, 2019
Patent application number
14928768
Date Filed
October 30, 2015
Patent primary examiner
‌
Peter Dungba Vo

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