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US Patent 10418493 Tight pitch stack nanowire isolation
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Patent
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Date Filed
December 19, 2017
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Date of Patent
September 17, 2019
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Patent Application Number
15847296
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Patent Citations Received
US Patent 11495688 Source and drain epitaxy and isolation for gate structures
US Patent 10985279 Source and drain epitaxy and isolation for gate structures
US Patent 11011651 Tight pitch stack nanowire isolation
US Patent 11664656 ESD protection for integrated circuit devices
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US Patent 11368016 ESD protection for integrated circuit devices
US Patent 10957802 Methods of forming tight pitch stack nanowire isolation
Patent Inventor Names
Effendi Leobandung
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10418493
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Patent Primary Examiner
Dung A. Le
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