Patent attributes
A control circuit for a impedance matching circuit having first and second capacitor arrays receives as input one or more RF parameters of the impedance matching circuit, and in response thereto: determines a first match configuration for the first capacitor array and a second match configuration for the second capacitor array to create an impedance match between a fixed RF source impedance and a variable RF load impedance, the first match configuration and the second match configuration being determined from one or more look-up tables and based upon the detected one or more RF parameters; and alters at least one of the first array configuration and the second array configuration to the first match configuration and the second match configuration, respectively, by controlling the on and off states of (a) each discrete capacitor of the first capacitor array and (b) each discrete capacitor of the second capacitor array.
