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US Patent 10825740 Low resistance source-drain contacts using high temperature silicides

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Edits on 26 Jun, 2024
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edited on 26 Jun, 2024
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Patent Citations Received
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US Patent 12020937 Carbon implantation for thicker gate silicide
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Official Website
https://pdfpiw.uspto.gov/.piw?Docid=108257400
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Infobox
Is a
Patent
Patent
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
108257400
Date of Patent
November 3, 2020
0
Patent Application Number
158550490
Date Filed
December 27, 2017
0
Official Website
https://pdfpiw.uspto.gov/.piw?Docid=108257400
Patent Citations
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US Patent 10011920 Low-temperature selective epitaxial growth of silicon for device integration
0
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US Patent 10032889 Self-aligned passivation of active regions
0
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US Patent 10032897 Single electron transistor with self-aligned Coulomb blockade
0
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US Patent 10090392 Semiconductor device and manufacturing method thereof
0
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US Patent 10109507 Fluorine contamination control in semiconductor manufacturing process
0
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US Patent 10153372 High mobility strained channels for fin-based NMOS transistors
0
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US Patent 10157995 Integrating junction formation of transistors with contact formation
0
Patent Primary Examiner
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Jay C Kim
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edited on 27 Sep, 2022
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Website URL
https://pdfpiw.uspto.gov/.piw?Docid=10825740
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 US Patent 10825740 Low resistance source-drain contacts using high temperature silicides

Infobox
Is a
Patent
Patent
Patent jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent number
10825740
Date of patent
November 3, 2020
Patent application number
15855049
Date Filed
December 27, 2017
Patent citations
‌
US Patent 10011920 Low-temperature selective epitaxial growth of silicon for device integration
‌
US Patent 10032889 Self-aligned passivation of active regions
‌
US Patent 10032897 Single electron transistor with self-aligned Coulomb blockade
‌
US Patent 10090392 Semiconductor device and manufacturing method thereof
‌
US Patent 10109507 Fluorine contamination control in semiconductor manufacturing process
‌
US Patent 10153372 High mobility strained channels for fin-based NMOS transistors
‌
US Patent 10157995 Integrating junction formation of transistors with contact formation
Patent primary examiner
‌
Jay C Kim

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