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US Patent 10840146 Structures and SRAM bit cells with a buried cross-couple interconnect

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Patent attributes

Patent Jurisdiction

United States Patent and Trademark Office

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Patent Number

Date of Patent

November 17, 2020

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Patent Application Number

164432520

Date Filed

June 17, 2019

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Patent Citations Received

US Patent 11538814 Static random access memory of 3D stacked devices

US Patent 11908910 Semiconductor device having embedded conductive line and method of fabricating thereof

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US Patent 12079559 IC device layout method

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US Patent 12132092 Backside vias in semiconductor device

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US Patent 11765878 Semiconductor device including a layer between a source/drain region and a substrate

US Patent 11349004 Backside vias in semiconductor device

US Patent 11783109 IC device manufacturing method

US Patent 11450673 Connection between source/drain and gate

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