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US Patent 11341308 Method and layout of an integrated circuit
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Patent
Current Assignee
Taiwan Semiconductor Manufacturing Company
Date Filed
February 18, 2021
Date of Patent
May 24, 2022
Patent Applicant
Taiwan Semiconductor Manufacturing Company
Patent Application Number
17179014
Patent Citations
US Patent 10402529 Method and layout of an integrated circuit
US Patent 10936780 Method and layout of an integrated circuit
Patent Citations Received
US Patent 11714947 Method and layout of an integrated circuit
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11341308
Patent Primary Examiner
Phallaka Kik
CPC Code
G06F 30/3953
G06F 2119/18
G06F 30/3947
G03F 1/36
H01L 21/027
H01L 21/76895
Y02P 90/02
G06F 30/398
G06F 30/392
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