US Patent 11527621 Gate electrode deposition and structure formed thereby

A method includes depositing a first work function tuning layer over a gate dielectric layer using an atomic layer deposition process. The atomic layer deposition process comprises depositing one or more first nitride monolayers; and depositing one or more carbide monolayers over the one or more first nitride monolayers. The method further includes depositing an adhesion layer of the first work function tuning layer; and depositing a conductive material over the adhesion layer.