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US Patent 11658245 Semiconductor device and method of manufacturing

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
July 31, 2020
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Date of Patent
May 23, 2023
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Patent Application Number
16945224
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Patent Citations
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US Patent 9412817 Silicide regions in vertical gate all around (VGAA) devices and methods of forming same
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US Patent 9412828 Aligned gate-all-around structure
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US Patent 9472618 Nanowire field effect transistor device having a replacement gate
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US Patent 9502265 Vertical gate all around (VGAA) transistors and methods of forming the same
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US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
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US Patent 9608116 FINFETs with wrap-around silicide and method forming the same
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US Patent 9711414 Strained stacked nanosheet FETS and/or quantum well stacked nanosheet
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US Patent 9853114 Field effect transistor with stacked nanowire-like channels and methods of manufacturing the same
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US Patent 10121870 Semiconductor device structure with strain-relaxed buffer
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US Patent 9905643 Vertically aligned nanowire channels with source/drain interconnects for nanosheet transistors
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•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11658245
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Patent Primary Examiner
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Brian Turner
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CPC Code
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H01L 27/1104
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H01L 29/0669
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H01L 29/1025
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H01L 29/42392
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