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US Patent 11664357 Techniques for joining dissimilar materials in microelectronics
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Patent
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Date Filed
July 2, 2019
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Date of Patent
May 30, 2023
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Patent Application Number
16459610
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Patent Citations
US Patent 10923413 Hard IP blocks with physically bidirectional passageways
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US Patent 11037919 Techniques for processing devices
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US Patent 11056348 Bonding surfaces for microelectronics
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US Patent 11069734 Image sensor device
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US Patent 11176450 Three dimensional circuit implementing machine trained network
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US Patent 11256004 Direct-bonded lamination for improved image clarity in optical devices
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US Patent 11264357 Mixed exposure for large die
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US Patent 11276676 Stacked devices and methods of fabrication
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US Patent 11329034 Direct-bonded LED structure contacts and substrate contacts
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US Patent 11348898 Systems and methods for releveled bump planes for chiplets
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•••
Patent Citations Received
US Patent 12068278 Processed stacked dies
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US Patent 11967575 Bond enhancement structure in microelectronics for trapping contaminants during direct-bonding processes
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US Patent 12009338 Dimension compensation control for directly bonded structures
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11664357
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Patent Primary Examiner
Michele Fan
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CPC Code
H01L 21/76251
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H01L 21/76275
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H01L 21/2007
0
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