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US Patent 11682449 Apparatuses and methods for compute in data path

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 US Patent 11682449 Apparatuses and methods for compute in data path

Article

The present disclosure includes apparatuses and methods for compute in data path. An example apparatus includes an array of memory cells. Sensing circuitry is coupled to the array of memory cells. A shared input/output (I/O) line provides a data path associated with the array. The shared I/O line couples the sensing circuitry to a compute component in the data path of the shared I/O line.

Infobox
Is a
Patent
Patent
0
Patent Applicant
Micron Technology
Micron Technology
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Current Assignee
Micron Technology
Micron Technology
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
116824490
Date of Patent
June 20, 2023
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Patent Application Number
173224420
Date Filed
May 17, 2021
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Patent Citations
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US Patent 7187585 Read operation for non-volatile storage that includes compensation for coupling
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US Patent 7196928 Compensating for coupling during read operations of non-volatile memory
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US Patent 7260672 Using data stored in a destructive-read memory
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US Patent 7372715 Architecture and method for NAND flash memory
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US Patent 7400532 Programming method to reduce gate coupling interference for non-volatile memory
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US Patent 7406494 Method of generating a cycle-efficient bit-reverse index array for a wireless communication system
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US Patent 7447720 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
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US Patent 7454451 Method for finding local extrema of a set of values for a parallel processing element
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US Patent 7535769 Time-dependent compensation currents in non-volatile memory read operations
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US Patent 7574466 Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
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US Patent 7663928 Sense amplifier circuit having current mirror architecture
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US Patent 7791962 Semiconductor device and semiconductor signal processing apparatus
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US Patent 7796453 Semiconductor device
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US Patent 7805587 Memory addressing controlled by PTE fields
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US Patent 7808854 Systems and methods for data transfers between memory cells
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US Patent 7869273 Reducing the impact of interference during programming
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US Patent 7898864 Read operation for memory with compensation for coupling based on write-erase cycles
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US Patent 7924628 Operation of a non-volatile memory array
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US Patent 7957206 Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same
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US Patent 7996749 Signal loss detector for high-speed serial interface of a programmable logic device
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US Patent 8045391 Non-volatile memory and method with improved sensing having bit-line lockout control
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US Patent 8059438 Content addressable memory array programmed to perform logic operations
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US Patent 8095825 Error correction method with instruction level rollback
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US Patent 8213248 Semiconductor memory device having improved local input/output line precharge scheme
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US Patent 8223568 Semiconductor memory device adopting improved local input/output line precharging scheme
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US Patent 8238173 Using storage cells to perform computation
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US Patent 8274841 Semiconductor signal processing device
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US Patent 8279683 Digit line comparison circuits
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US Patent 8310884 Semiconductor memory device
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US Patent 8332367 Parallel data redundancy removal
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US Patent 8339824 Nearest neighbor serial content addressable memory
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US Patent 8347154 Use of hashing function to distinguish random and repeat errors in a memory system
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US Patent 8356144 Vector processor system
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US Patent 8417921 Running-min and running-max instructions for processing vectors using a base value from a key element of an input vector
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US Patent 8484276 Processing array data on SIMD multi-core processor architectures
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US Patent 8526239 Semiconductor memory device and method of operating the same
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US Patent 8533245 Multipliers with a reduced number of memory blocks
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US Patent 8555037 Processing vectors using wrapping minima and maxima instructions in the macroscalar architecture
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US Patent 8599613 Nonvolatile semiconductor memory
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US Patent 8605015 Spatial light modulator with masking-comparators
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US Patent 8625376 Semiconductor memory device and method of operation the same
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US Patent 8644101 Local sense amplifier circuit and semiconductor memory device including the same
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US Patent 8650232 System and method for determination of a horizontal minimum of digital values
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US Patent 8873272 Semiconductor memory apparatus and test circuit therefor
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US Patent 8971124 Apparatuses and methods for performing logical operations using sensing circuitry
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US Patent 9047193 Processor-cache system and method
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US Patent 9165023 Integrated circuit device and method for determining an index of an extreme value within an array of values
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US Patent 9460793 Semiconductor memory device
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US Patent 11011220 Apparatuses and methods for compute in data path
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Patent Primary Examiner
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Son T. Dinh
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CPC Code
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G11C 11/4097
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G11C 7/18
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G11C 5/063
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G11C 5/04
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G11C 5/025
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