A semiconductor structure with one or more backside metal layers that include a plurality of portions of a floating metal layer separated by dielectric material from one or more power and ground lines in the backside metal layer. The height of each of the plurality of portions of the floating metal layer in each of the one or more backside metal layers and the distance between adjacent portions of the plurality of portions of the floating metal layer in each of the one or more backside metal layer correlates to the capacitance of each of the one or more backside metal layers.