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US Patent 11764071 Apparatus for stressing semiconductor substrates
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Patent
Date Filed
June 11, 2019
Date of Patent
September 19, 2023
Patent Application Number
16437988
Patent Citations
US Patent 7232591 Method of using an adhesive for temperature control during plasma processing
US Patent 7288492 Method for forming interconnects on thin wafers
US Patent 7416965 Method for producing a strained layer on a substrate and corresponding layer structure
US Patent 7432476 Substrate heat treatment apparatus
US Patent 7550309 Method for producing semiconductor wafer
US Patent 7642179 Semiconductor substrate and manufacturing method for the same
US Patent 7732301 Bonded intermediate substrate and method of making same
US Patent 7855127 Method for manufacturing semiconductor substrate
US Patent 7972663 Method and apparatus for forming a high quality low temperature silicon nitride layer
US Patent 7994595 Strained semiconductor by full wafer bonding
•••
Patent Inventor Names
Peter D. Albrecht
Vladimir V. Voronkov
Robert J. Falster
John A. Pitney
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11764071
Patent Primary Examiner
Jeffrie R. Lund
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