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US Patent 11784120 Metal via structure

Overview Structured Data Issues Contributors Activity

Is a

Patent

Date Filed

September 21, 2021

Date of Patent

October 10, 2023

Patent Application Number

17480824

Patent Citations

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US Patent 9385078 Self aligned via in integrated circuit

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US Patent 9653303 Method of manufacturing semiconductor device

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US Patent 9786557 Two-dimensional self-aligned super via integration on self-aligned gate contact

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US Patent 9805972 Skip via structures

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US Patent 10020254 Integration of super via structure in BEOL

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US Patent 9805977 Integrated circuit structure having through-silicon via and method of forming same

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US Patent 10020255 Integration of super via structure in BEOL

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US Patent 7620926 Methods and structures for flexible power management in integrated circuits

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US Patent 8114769 Methods and structures to enable self-aligned via etch for Cu damascene structure using trench first metal hard mask (TFMHM) scheme

Patent Inventor Names

Yann Mignot

Daniel J. Vincent

James J. Kelly

Yongan Xu

Muthumanickam Sankarapandian

Hsueh-Chung Chen

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

11784120

Patent Primary Examiner

CPC Code

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