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US Patent 11804532 Gate-all-around devices with superlattice channel
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Patent
Date Filed
August 27, 2021
Date of Patent
October 31, 2023
Patent Application Number
17459855
Patent Citations
US Patent 9786774 Metal gate of gate-all-around transistor
US Patent 9853101 Strained nanowire CMOS device and method of forming
US Patent 9881993 Method of forming semiconductor structure with horizontal gate all around structure
US Patent 9520482 Method of cutting metal gate
US Patent 9536738 Vertical gate all around (VGAA) devices and methods of manufacturing the same
US Patent 9576814 Method of spacer patterning to form a target integrated circuit pattern
US Patent 9608116 FINFETs with wrap-around silicide and method forming the same
US Patent 9236267 Cut-mask patterning process for fin-like field effect transistor (FinFET) device
US Patent 9502265 Vertical gate all around (VGAA) transistors and methods of forming the same
US Patent 9520466 Vertical gate-all-around field effect transistors and methods of forming same
Patent Inventor Names
Shin-Cheng Liu
Kuei-Shu Chang Liao
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11804532
Patent Primary Examiner
David C Spalla
CPC Code
H01L 29/7851
H01L 29/7853
H01L 29/7855
H01L 29/78696
H01L 2029/7858
H01L 29/78618
H01L 21/02603
H01L 21/823418
H01L 21/823431
H01L 21/823821
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